24LC64F-E/P集成電路（IC）的存儲器規(guī)格書PDF中文資料

24LC64F-E/P屬于集成電路（IC）的存儲器。由微芯科技股份有限公司制造生產(chǎn)的24LC64F-E/P存儲器存儲器是集成電路上用作數(shù)據(jù)存儲設(shè)備的半導體器件。這些器件分為非易失性或易失性兩種，格式包括 CBRAM、DRAM、EEPROM、EERAM、EPROM、閃存、FRAM、NVSRAM、PCM (PRAM)、PSRAM、RAM 和 SRAM。這些器件的存儲容量為 64 b 至 6 Tb 不等，接口有 I2C、MMC、并行、eMMC、串行、單線、SPI、UFS、Xccela 總線和 1-線。

Description:

The Microchip Technology Inc. 24AA64F/24LC64F (24XX64F*) is a 64 Kbit Electrically Erasable PROM. The device is organized as a single block of 8K x 8-bit memory with a 2-wire serial interface. Low-voltage design permits operation down to 1.7V, with standby and read currents of only 1 μA and 400 μA, respectively. It has been developed for advanced, low power applications such as personal communications or data acquisition. The 24XX64F also has a page write capability for up to 32 bytes of data. Functional address lines allow up to eight devices on the same bus, for up to 512 Kbits address space. The 24XX64F is available in the standard 8-pin PDIP, surface mount SOIC, TSSOP, TDFN and MSOP packages. The 24XX64F is also available in the 5-lead SOT-23 package.

Features:

? Single-Supply with Operation down to 1.7V for 24AA64F devices, 2.5V for 24LC64F devices

? Low-Power CMOS Technology:

- Read current 400 μA, max.

- Standby current 1 μA, max. (I-temp)

? 2-Wire Serial Interface, I2C? Compatible

? Packages with 3 Address Pins are cascadable up to 8 Devices

? Schmitt Trigger Inputs for Noise Suppression

? Output Slope Control to Eliminate Ground Bounce

? 100 kHz and 400 kHz Clock Compatibility

? Page Write Time 5 ms, typical

? Self-timed Erase/Write Cycle

? 32-Byte Page Write Buffer

? Hardware Write-protect for 1/4 Array (1800h-1FFFh)

? ESD Protection > 4,000V

? More than 1 Million Erase/Write Cycles

? Data Retention > 200 Years

? Factory Programming Available

? Packages include 8-lead PDIP, SOIC, TSSOP, MSOP, TDFN, 5-lead SOT-23

? Pb-Free and RoHS Compliant

? Temperature Ranges:

- Industrial (I): -40°C to +85°C

- Automotive (E): -40°C to +125°C