首頁>74ACT11M>規(guī)格書詳情

74ACT11M中文資料意法半導(dǎo)體數(shù)據(jù)手冊PDF規(guī)格書

74ACT11M
廠商型號

74ACT11M

功能描述

TRIPLE 3-INPUT AND GATE

文件大小

67.25 Kbytes

頁面數(shù)量

7

生產(chǎn)廠商 STMicroelectronics
企業(yè)簡稱

STMICROELECTRONICS意法半導(dǎo)體

中文名稱

意法半導(dǎo)體集團(tuán)官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-5-20 15:23:00

人工找貨

74ACT11M價(jià)格和庫存,歡迎聯(lián)系客服免費(fèi)人工找貨

74ACT11M規(guī)格書詳情

DESCRIPTION

The 74ACT11 is an advanced high-speed CMOS TRIPLE 3-INPUT AND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology.

The internal circuit is composed of 4 stages including buffer output, which enables high noise immunity and stable output.

The device is designed to interface directly High Speed CMOS systems with TTL, NMOS and CMOS output voltage levels.

All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

■ HIGH SPEED: tPD = 4.5ns (TYP.) at VCC = 5V

■ LOW POWER DISSIPATION: ICC = 2μA(MAX.) at TA=25°C

■ COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.), VIL = 0.8V (MAX.)

■ 50? TRANSMISSION LINE DRIVING CAPABILITY

■ SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN)

■ BALANCED PROPAGATION DELAYS: tPLH ? tPHL

■ OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V

■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 11

■ IMPROVED LATCH-UP IMMUNITY

供應(yīng)商 型號 品牌 批號 封裝 庫存 備注 價(jià)格
FAIRCHILD/仙童
24+
NA/
179
優(yōu)勢代理渠道,原裝正品,可全系列訂貨開增值稅票
詢價(jià)
NSC
23+
SMD-SO14
9856
原裝正品,假一罰百!
詢價(jià)
ST
23+
SOP
10000
原裝正品,支持實(shí)單
詢價(jià)
NSC
23+
SO-14-5.2
9823
詢價(jià)
ST
24+
TSSOP
16900
支持樣品,原裝現(xiàn)貨,提供技術(shù)支持!
詢價(jià)
ST
24+
SOP
6000
全新原裝深圳倉庫現(xiàn)貨有單必成
詢價(jià)
FAIRCHILD
24+
TSSOP
2789
全新原裝自家現(xiàn)貨!價(jià)格優(yōu)勢!
詢價(jià)
ST
22+
SOP
9000
只有原裝,原裝,假一罰十
詢價(jià)
FSC
06+
SOIC
1000
全新原裝 絕對有貨
詢價(jià)
ST
24+
SOP
30000
原裝正品公司現(xiàn)貨,假一賠十!
詢價(jià)