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74ALS377DB中文資料飛利浦?jǐn)?shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
74ALS377DB規(guī)格書(shū)詳情
DESCRIPTION
The 74ALS377 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered clock (CP) input loads all flip-flops simultaneously when the Enable (E) is Low.
The register is fully edge-triggered. The state of each D input, one setup time before the Low-to-High clock transition, is transferred to the corresponding flip-flop’s Q output. The E input must be stable one setup time prior to the Low-to-High clock transition for predictable operation.
FEATURES
? Ideal for addressable register applications
? Enable for address and data synchronization applications
? Eight edge-triggered D-type flip-flops
? Buffered common clock
? See 74ALS273 for master reset version
? See 74ALS373 for transparent latch version
? See 74ALS374 for 3-State version
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
FAIRCHILD/仙童 |
21+ |
SOP16-3.9MM |
8000 |
全新原裝 公司現(xiàn)貨 價(jià)格優(yōu) |
詢價(jià) | ||
TI |
24+ |
35200 |
一級(jí)代理/放心采購(gòu) |
詢價(jià) | |||
TI/德州儀器 |
23+ |
SOP |
3000 |
一級(jí)代理原廠VIP渠道,專注軍工、汽車、醫(yī)療、工業(yè)、 |
詢價(jià) | ||
S |
23+ |
DIP |
25 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價(jià) | ||
FAIRCHILD/仙童 |
22+ |
SOP16-3.9MM |
50000 |
只做原裝正品,假一罰十,歡迎咨詢 |
詢價(jià) | ||
ti |
24+ |
N/A |
6980 |
原裝現(xiàn)貨,可開(kāi)13%稅票 |
詢價(jià) | ||
ti |
24+ |
500000 |
行業(yè)低價(jià),代理渠道 |
詢價(jià) | |||
S |
21+ |
DIP |
25 |
原裝現(xiàn)貨假一賠十 |
詢價(jià) | ||
TI |
23+ |
NA |
1486 |
專做原裝正品,假一罰百! |
詢價(jià) | ||
FAIRCHILD |
SOP16-3.9MM |
608900 |
原包原標(biāo)簽100%進(jìn)口原裝常備現(xiàn)貨! |
詢價(jià) |
