74ALVC574BQ集成電路（IC）的觸發(fā)器規(guī)格書PDF中文資料

廠商型號	74ALVC574BQ
參數(shù)屬性	74ALVC574BQ 封裝/外殼為20-VFQFN 裸露焊盤；包裝為卷帶（TR）；類別為集成電路（IC）的觸發(fā)器；產(chǎn)品描述：IC FF D-TYPE SNGL 8BIT 20DHVQFN
功能描述	Octal D-type flip-flop; positive edge-trigger; 3-state
封裝外殼	20-VFQFN 裸露焊盤
文件大小	262.9 Kbytes
頁面數(shù)量	15 頁
生產(chǎn)廠商	Nexperia B.V. All rights reserved
企業(yè)簡稱	NEXPERIA【安世】
中文名稱	安世半導體(中國)有限公司官網(wǎng)
原廠標識
數(shù)據(jù)手冊	下載地址一下載地址二到原廠下載
更新時間	2025-2-22 22:59:00
人工找貨	74ALVC574BQ價格和庫存，歡迎聯(lián)系客服免費人工找貨

1. General description

The 74ALVC574 is an octal D-type flip-flop featuring separate D-type inputs for each flip-flop and

3-state outputs for bus-oriented applications. A clock input (CP) and an outputs enable input (OE)

are common to all flip-flops.

The eight flip-flops will store the state of their individual D-inputs that meet the set-up and hold

times requirements on the LOW to HIGH CP transition.

When pin OE is LOW, the contents of the eight flip-flops is available at the outputs. When pin OE is

HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE input does not affect

the state of the flip-flops.

The 74ALVC574 is functionally identical to the 74ALVC374, but has a different pin arrangement.

2. Features and benefits

? Wide supply voltage range from 1.65 V to 3.6 V

? 3.6 V tolerant inputs/outputs

? CMOS low power consumption

? Direct interface with TTL levels (2.7 V to 3.6 V)

? Power-down mode

? Latch-up performance exceeds 250 mA

? Complies with JEDEC standards:

? JESD8-7 (1.65 V to 1.95 V)

? JESD8-5 (2.3 V to 2.7 V)

? JESD8B (2.7 V to 3.6 V)

? ESD protection:

? HBM JESD22-A114E exceeds 2000 V

? MM JESD22-A115-A exceeds 200 V