74AUP1G17-Q100中文資料安世數(shù)據(jù)手冊PDF規(guī)格書

1. General description

The 74AUP1G17-Q100 is a single buffer with Schmitt-trigger input. This device ensures very low

static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device

is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the

output, preventing the potentially damaging backflow current through the device when it is powered

down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100

(Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

? Automotive product qualification in accordance with AEC-Q100 (Grade 1)

? Specified from -40 °C to +85 °C and from -40 °C to +125 °C

? Wide supply voltage range from 0.8 V to 3.6 V

? CMOS low power dissipation

? High noise immunity

? Overvoltage tolerant inputs to 3.6 V

? Low noise overshoot and undershoot < 10 of VCC

? IOFF circuitry provides partial Power-down mode operation

? Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

? Low static power consumption; ICC = 0.9 μA (maximum)

? Complies with JEDEC standards:

? JESD8-12 (0.8 V to 1.3 V)

? JESD8-11 (0.9 V to 1.65 V)

? JESD8-7 (1.2 V to 1.95 V)

? JESD8-5 (1.8 V to 2.7 V)

? JESD8C (2.7 V to 3.6 V)

? ESD protection:

? HBM: ANSI/ESDA/JEDEC JS-001 Class 3A exceeds 5000 V

? CDM: ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 1000 V

? MM: JESD22-A115-A exceeds 200 V