74HC238PW-Q100集成電路（IC）的信號開關多路復用器解碼器規(guī)格書PDF中文資料

1. General description

The 74HC238-Q100; 74HCT238-Q100 decodes three binary weighted address inputs (A0, A1

and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs

(E1 and E2 and E3). Every output will be LOW unless E1 and E2 are LOW and E3 is HIGH. This

multiple enable function allows easy parallel expansion to a 1-of-32 (5 to 32 lines) decoder with

just four '238 ICs and one inverter. The '238 can be used as an eight output demultiplexer by using

one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes.

Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to

voltages in excess of VCC.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100

(Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

? Automotive product qualification in accordance with AEC-Q100 (Grade 1)

? Specified from -40 °C to +85 °C and from -40 °C to +125 °C

? Demultiplexing capability

? Multiple input enable for easy expansion

? Ideal for memory chip select decoding

? Active HIGH mutually exclusive outputs

? Multiple package options

? Complies with JEDEC standard no. 7A

? Input levels:

? For 74HC238: CMOS level

? For 74HCT238: TTL level

? ESD protection:

? MIL-STD-883, method 3015 exceeds 2000 V

? HBM JESD22-A114F exceeds 2000 V

? MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)

? DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of

solder joints