74LS244中文資料仙童半導(dǎo)體數(shù)據(jù)手冊(cè)PDF規(guī)格書

General Description

These buffers/line drivers are designed to improve both the performance and PC board density of 3-STATE buffers/drivers employed as memory-address drivers, clock drivers, and bus-oriented transmitters/receivers. Featuring 400 mV of hysteresis at each low current PNP data line input, they provide improved noise rejection and high fanout outputs and can be used to drive terminated lines down to 133?.

Features

■ 3-STATE outputs drive bus lines directly

■ PNP inputs reduce DC loading on bus lines

■ Hysteresis at data inputs improves noise margins

■ Typical IOL (sink current) 24 mA

■ Typical IOH (source current) ?15 mA

■ Typical propagation delay times

Inverting 10.5 ns

Noninverting 12 ns

■ Typical enable/disable time 18 ns

■ Typical power dissipation (enabled)

Inverting 130 mW

Noninverting 135 mW