74LVC1G19GM集成電路（IC）的信號開關多路復用器解碼器規(guī)格書PDF中文資料

廠商型號	74LVC1G19GM
參數(shù)屬性	74LVC1G19GM 封裝/外殼為6-XFDFN；包裝為管件；類別為集成電路（IC）的信號開關多路復用器解碼器；產(chǎn)品描述：IC DECODER/DEMUX 1 X 1:2 6XSON
功能描述	1-of-2 decoder/demultiplexer
絲印標識	VY
封裝外殼	SOT886 / 6-XFDFN
文件大小	244.58 Kbytes
頁面數(shù)量	16 頁
生產(chǎn)廠商	Nexperia B.V. All rights reserved
企業(yè)簡稱	NEXPERIA【安世】
中文名稱	安世半導體(中國)有限公司官網(wǎng)
原廠標識
數(shù)據(jù)手冊	下載地址一下載地址二到原廠下載
更新時間	2025-5-25 15:14:00
人工找貨	74LVC1G19GM價格和庫存，歡迎聯(lián)系客服免費人工找貨

1. General description

The 74LVC1G19 is a 1-of-2 decoder/demultiplexer with a common output enable. This device

buffers the data on input A and passes it to the outputs 1Y (true) and 2Y (complement) when the

enable (E) input signal is LOW. A HIGH E causes both outputs to assume a HIGH state.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices

in a mixed 3.3 V and 5 V environment.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry

disables the output, preventing the potentially damaging backflow current through the device when

it is powered down.

2. Features and benefits

? Wide supply voltage range from 1.65 V to 5.5 V

? Overvoltage tolerant inputs to 5.5 V

? High noise immunity

? ±24 mA output drive (VCC = 3.0 V)

? CMOS low power dissipation

? Latch-up performance exceeds 250 mA

? Direct interface with TTL levels

? IOFF circuitry provides partial Power-down mode operation

? Complies with JEDEC standard:

? JESD8-7 (1.65 V to 1.95 V)

? JESD8-5 (2.3 V to 2.7 V)

? JESD8C (2.7 V to 3.6 V)

? JESD36 (4.5 V to 5.5 V)

? ESD protection:

? HBM JESD22-A114F exceeds 2000 V

? MM JESD22-A115-A exceeds 200 V

? Multiple package options

? Specified from -40 °C to +85 °C and -40 °C to +125 °C.