74LVQ14集成電路（IC）的門(mén)反相器規(guī)格書(shū)PDF中文資料

74LVQ14屬于集成電路（IC）的門(mén)反相器。由意法半導(dǎo)體集團(tuán)制造生產(chǎn)的74LVQ14門(mén)和反相器邏輯柵極和逆變器系列中的產(chǎn)品對(duì)單個(gè)邏輯信號(hào)執(zhí)行基本邏輯運(yùn)算（例如 AND、NOT、OR 等）。與觸發(fā)器不同，它們不能夠存儲(chǔ)信息，不會(huì)對(duì)提供給其輸入的信號(hào)立即做出響應(yīng)。雖然早就被集成電路實(shí)施形式所取代，以用于實(shí)現(xiàn)復(fù)雜功能，但分立柵極仍可在僅需要非常簡(jiǎn)單邏輯功能的情況下使用。

DESCRIPTION

The 74LVQ14 is a low voltage CMOS HEX SCHMITT INVERTER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications.

The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output.

Pin configuration and function are the same as those of the 74LVQ04 but the 74LVQ14 has hysteresis between the positive and negative input threshold typically of 650mV.

This together with its schmitt trigger function allows it to be used on line receivers with slow rise/fall input signals.

All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

■ HIGH SPEED:

tPD = 6 ns (TYP.) at VCC = 3.3 V

■ HYSTERESIS INPUT VOLTAGE:

VH = 650mV (TYP.) at VCC = 3.0 V

■ COMPATIBLE WITH TTL OUTPUTS

■ LOW POWER DISSIPATION:

ICC = 2μA(MAX.) at TA=25°C

■ LOW NOISE:

VOLP = 0.3V (TYP.) at VCC = 3.3V

■ 75? TRANSMISSION LINE DRIVING CAPABILITY

■ SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 12mA (MIN) at VCC = 3.0 V

■ PCI BUS LEVELS GUARANTEED AT 24 mA

■ BALANCED PROPAGATION DELAYS: tPLH ? tPHL

■ OPERATING VOLTAGE RANGE:

VCC(OPR) = 2V to 3.6V

■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 14

■ IMPROVED LATCH-UP IMMUNITY