74LVX86集成電路（IC）的門反相器規(guī)格書PDF中文資料

74LVX86屬于集成電路（IC）的門反相器。由意法半導(dǎo)體集團(tuán)制造生產(chǎn)的74LVX86門和反相器邏輯柵極和逆變器系列中的產(chǎn)品對單個邏輯信號執(zhí)行基本邏輯運(yùn)算（例如 AND、NOT、OR 等）。與觸發(fā)器不同，它們不能夠存儲信息，不會對提供給其輸入的信號立即做出響應(yīng)。雖然早就被集成電路實(shí)施形式所取代，以用于實(shí)現(xiàn)復(fù)雜功能，但分立柵極仍可在僅需要非常簡單邏輯功能的情況下使用。

DESCRIPTION

The 74LVX86 is a low voltage CMOS QUAD EXCLUSIVE OR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power, battery operated and low noise 3.3V applications.

Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage.

This device can be used to interface 5V to 3V system. It combines high speed performance with the true CMOS low power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

■ HIGH SPEED:

tPD = 5.8 ns (TYP.) at VCC = 3.3V

■ 5V TOLERANT INPUTS

■ INPUT VOLTAGE LEVEL:

VIL=0.8V, VIH=2V at VCC=3V

■ LOW POWER DISSIPATION:

ICC = 2 μA (MAX.) at TA=25°C

■ LOW NOISE:

VOLP = 0.3V (TYP.) at VCC = 3.3V

■ SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 4mA (MIN)

■ BALANCED PROPAGATION DELAYS: tPLH ? tPHL

■ OPERATING VOLTAGE RANGE:

VCC(OPR) = 2V to 3.6V (1.2V Data Retention)

■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 86

■ IMPROVED LATCH-UP IMMUNITY

■ POWER DOWN PROTECTION ON INPUTS