844003-01中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

General Description

The 844003-01 is a 3 differential output LVDS Synthesizer

designed to generate Ethernet refer- ence clock frequencies.

Using a 19.53125MHz or 25MHz, 18pF parallel resonant crystal,

the following frequencies can be generated based on the settings

of 4 frequency select pins (DIV_SELA[1:0], DIV_SELB[1:0]):

625MHz, 312.5MHz, 156.25MHz, and 125MHz. The 844003-01

has 2 output banks, Bank A with 1 differential LVDS output pair

and Bank B with 2 differential LVDS output pairs.

The two banks have their own dedicated frequency select pins and

can be independently set for the frequencies mentioned above.

The 844003-01 uses IDT’s 3rd generation low phase noise VCO

technology and can achieve 1ps or lower typical rms phase jitter,

easily meeting Ethernet jitter requirements. The 844003-01 is

packaged in a small 24-pin TSSOP package.

Features

? Three differential LVDS output pairs on two banks, Bank A with

one LVDS pair and Bank B with two LVDS output pairs

? Using a 19.53125MHz or 25MHz crystal, the two output banks

can be independently set for 625MHz, 312.5MHz, 156.25MHz

or 125MHz

? Selectable crystal oscillator interface or LVCMOS/LVTTL

single-ended input

? VCO range: 490MHz - 680MHz

? RMS phase jitter @ 156.25MHz (1.875MHz – 20MHz):

0.56ps (typical)

? Full 3.3V supply mode

? 0°C to 70°C ambient operating temperature

? Available in lead-free (RoHS 6) package