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A3P125-2FG144YES中文資料美高森美數(shù)據(jù)手冊(cè)PDF規(guī)格書
| 廠商型號(hào) |
A3P125-2FG144YES |
| 功能描述 | ProASIC3 Flash Family FPGAs with Optional Soft ARM Support |
| 文件大小 |
10.66938 Mbytes |
| 頁面數(shù)量 |
220 頁 |
| 生產(chǎn)廠商 | Microsemi Corporation |
| 企業(yè)簡(jiǎn)稱 |
Microsemi【美高森美】 |
| 中文名稱 | 美高森美公司官網(wǎng) |
| 原廠標(biāo)識(shí) |  |
| 數(shù)據(jù)手冊(cè) | |
| 更新時(shí)間 | 2025-2-24 14:41:00 |
| 人工找貨 | A3P125-2FG144YES價(jià)格和庫存，歡迎聯(lián)系客服免費(fèi)人工找貨 |
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Features and Benefits
High Capacity
? 15 k to 1 M System Gates
? Up to 144 kbits of True Dual-Port SRAM
? Up to 300 User I/Os
Reprogrammable Flash Technology
? 130-nm, 7-Layer Metal (6 Copper), Flash-Based CMOS Process
? Instant On Level 0 Support
? Single-Chip Solution
? Retains Programmed Design when Powered Off
High Performance
? 350 MHz System Performance
? 3.3 V, 66 MHz 64-Bit PCI?
In-System Programming (ISP) and Security
? ISP Using On-Chip 128-Bit Advanced Encryption Standard (AES) Decryption (except ARM?-enabled ProASIC?3 devices) via JTAG (IEEE 1532–compliant)?
? FlashLock? to Secure FPGA Contents
Low Power
? Core Voltage for Low Power
? Support for 1.5 V-Only Systems
? Low-Impedance Flash Switches
High-Performance Routing Hierarchy
? Segmented, Hierarchical Routing and Clock Structure
Advanced I/O
? 700 Mbps DDR, LVDS-Capable I/Os (A3P250 and above)
? 1.5 V, 1.8 V, 2.5 V, and 3.3 V Mixed-Voltage Operation
? Wide Range Power Supply Voltage Support per JESD8-B, Allowing I/Os to Operate from 2.7 V to 3.6 V
? Bank-Selectable I/O Voltages—up to 4 Banks per Chip
? Single-Ended I/O Standards: LVTTL, LVCMOS 3.3 V / 2.5 V / 1.8 V / 1.5 V, 3.3 V PCI / 3.3 V PCI-X? and LVCMOS 2.5 V / 5.0 V Input
? Differential I/O Standards: LVPECL, LVDS, B-LVDS, and M-LVDS (A3P250 and above)
? I/O Registers on Input, Output, and Enable Paths
? Hot-Swappable and Cold Sparing I/Os?
? Programmable Output Slew Rate? and Drive Strength
? Weak Pull-Up/-Down
? IEEE 1149.1 (JTAG) Boundary Scan Test
? Pin-Compatible Packages across the ProASIC3 Family
Clock Conditioning Circuit (CCC) and PLL?
? Six CCC Blocks, One with an Integrated PLL
? Configurable Phase-Shift, Multiply/Divide, Delay Capabilities and External Feedback
? Wide Input Frequency Range (1.5 MHz to 350 MHz)
Embedded Memory?
? 1 kbit of FlashROM User Nonvolatile Memory
? SRAMs and FIFOs with Variable-Aspect-Ratio 4,608-Bit RAM Blocks (×1, ×2, ×4, ×9, and ×18 organizations)?
? True Dual-Port SRAM (except ×18)
ARM Processor Support in ProASIC3 FPGAs
? M1 ProASIC3 Devices—ARM?Cortex?-M1 Soft Processor Available with or without Debug
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
Microsemi Corporation |
22+ |
144FPBGA |
9000 |
原廠渠道,現(xiàn)貨配單 |
詢價(jià) | ||
Microchip |
21+ |
Low Profile Fine Pitch Ball Gr |
15000 |
只做原裝 |
詢價(jià) | ||
Microsemi SoC |
23+ |
144-LBGA |
11200 |
主營(yíng):汽車電子,停產(chǎn)物料,軍工IC |
詢價(jià) | ||
ACTEL/愛特 |
23+ |
NA/ |
200 |
優(yōu)勢(shì)代理渠道,原裝正品,可全系列訂貨開增值稅票 |
詢價(jià) | ||
Microsemi(美高森美) |
23+ |
FPBGA144 |
7350 |
現(xiàn)貨供應(yīng),當(dāng)天可交貨!免費(fèi)送樣,原廠技術(shù)支持!!! |
詢價(jià) | ||
Microchip / Microsemi |
20+ |
FBGA |
29860 |
Microchip全新FPGA-可開原型號(hào)增稅票 |
詢價(jià) | ||
Microchip Technology |
24+ |
144-LBGA |
9350 |
獨(dú)立分銷商 公司只做原裝 誠(chéng)心經(jīng)營(yíng) 免費(fèi)試樣正品保證 |
詢價(jià) | ||
MicrosemiCorporation |
24+ |
144-FPBGA(13x13) |
66800 |
原廠授權(quán)一級(jí)代理,專注汽車、醫(yī)療、工業(yè)、新能源！ |
詢價(jià) | ||
Microsemi(美高森美) |
2021+ |
FPBGA-144(13x13) |
499 |
詢價(jià) | |||
Microsemi Corporation |
21+ |
49-UFBGA,WLCSP |
3860 |
進(jìn)口原裝!長(zhǎng)期供應(yīng)!絕對(duì)優(yōu)勢(shì)價(jià)格(誠(chéng)信經(jīng)營(yíng) |
詢價(jià) |
