AD5025BRUZ集成電路（IC）的數(shù)模轉(zhuǎn)換器（DAC）規(guī)格書PDF中文資料

AD5025BRUZ屬于集成電路（IC）的數(shù)模轉(zhuǎn)換器（DAC）。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的AD5025BRUZ數(shù)模轉(zhuǎn)換器（DAC）數(shù)模轉(zhuǎn)換器（DAC、D/A、D2A 或 D 轉(zhuǎn) A）可將數(shù)字信號(hào)轉(zhuǎn)換為緩沖或無(wú)緩沖的模擬電壓或電流。DAC 架構(gòu)是否適合特定應(yīng)用，要取決于分辨率和采樣頻率。DAC 通常用于音樂(lè)播放器，將數(shù)字?jǐn)?shù)據(jù)流轉(zhuǎn)換為模擬音頻流。它們還用于電視和手機(jī)，將數(shù)字視頻數(shù)據(jù)轉(zhuǎn)換為模擬視頻信號(hào)，再連接到屏幕驅(qū)動(dòng)器，以顯示單色或彩色圖像。

GENERAL DESCRIPTION

The AD5025/AD5045/AD5065 are low power, dual 12-/14-/16-bit buffered voltage output nanoDAC? DACs offering relative accuracy specifications of ±1 LSB INL with individual reference pins, and can operate from a single 4.5 V to 5.5 V supply. The AD5025/ AD5045/AD5065 also offer a differential accuracy specification of ±1 LSB. The parts use a versatile 3-wire, low power Schmitt trigger serial interface that operates at clock rates up to 50 MHz and is compatible with standard SPI?, QSPI?, MICROWIRE?, and DSP interface standards.

FEATURES

Low power dual 12-/14-/16-bit DAC, ±1 LSB INL

Individual voltage reference pins

Rail-to-rail operation

4.5 V to 5.5 V power supply

Power-on reset to zero scale or midscale

Power down to 400 nA @ 5 V

3 power-down functions

Per channel power-down

Low glitch upon power-up

Hardware power-down lockout capability

Hardware LDAC with software LDAC override function

CLR function to programmable code

SDO daisy-chaining option

14-lead TSSOP

APPLICATIONS

Process controls

Data acquisition systems

Portable battery-powered instruments

Digital gain and offset adjustment

Programmable voltage and current sources

Programmable attenuators