AD647J中文資料亞德諾數(shù)據(jù)手冊PDF規(guī)格書

PRODUCT DESCRIPTION

The AD647 is an ultralow drift, dual JFET amplifier that combines high performance and convenience in a single package. The AD647 uses the most advanced ion-implantation and laser wafer drift trimming technologies to achieve the highest performance currently available in a dual JFET. Ion-implantation permits the fabrication of matched JFETs on a monolithic bipolar chip. Laser wafer drift trimming trims both the initial offset voltage and its drift with temperature to provide offsets as low as 100 μV (250 μV max) and drifts of 2.5 μV/°C max.

FEATURES

Low Offset Voltage Drift

Matched Offset Voltage

Matched Offset Voltage Over Temperature

Matched Bias Currents

Crosstalk: –124 dB at 1 kHz

Low Bias Current: 35 pA max Warmed Up

Low Offset Voltage: 250 mV max

Low Input Voltage Noise: 2 mV p-p

High Open Loop Gain: 108 dB

Low Quiescent Current: 2.8 mA max

Low Total Harmonic Distortion

Standard Dual Amplifier Pinout

Available in Hermetic Metal Can Package, Hermetic Surface Mount (20-Pin LCC) and Chip Form

MIL-STD-883B Processing Also Available

Single Version Available: AD547