AD8197B-EVALZ中文資料亞德諾數(shù)據(jù)手冊PDF規(guī)格書

GENERAL DESCRIPTION

The AD8197B is an HDMI?/DVI switch featuring equalized TMDS? inputs and pre-emphasized TMDS outputs, ideal for systems with long cable runs. The AD8197B offers individual control of the on/off state of the TMDS input termination resistors via I2C? control. Outputs can be set to a high impedance state to reduce the power dissipation and/or to allow the construction of larger arrays using the wire-OR technique. The AD8197B is provided in a 100-lead LQFP, Pb-free, surface

mount package, specified to operate over the ?40°C to +85°Ctemperature range.

FEATURES

4 inputs, 1 output HDMI/DVI links

Enables HDMI 1.3-compliant receiver

Pin-to-pin compatible with the AD8197A

4 TMDS channels per link

Supports 250 Mbps to 2.25 Gbps data rates

Supports 25 MHz to 225 MHz pixel clocks

Equalized inputs allow use of long HDMI cables

(20 meters at 2.25 Gbps)

Fully buffered unidirectional inputs/outputs

Per input switchable, 50 Ω on-chip terminations

Switchable output 50 Ω on-chip terminations

Pre-emphasized outputs

Low added jitter

Single-supply operation (3.3 V)

4 auxiliary channels per link

Bidirectional unbuffered inputs/outputs

Flexible supply operation (3.3 V to 5 V)

HDCP standard compatible

Allows switching of DDC bus and 2 additional signals

Output disable feature

Reduced power dissipation

Removable output termination

Allows building of larger arrays

Two AD8197Bs support HDMI/DVI dual link

Standards compatible: HDMI receiver, HDCP, DVI

Serial (I2C slave) and parallel control interface

100-lead, 14 mm × 14 mm LQFP, Pb-free package

APPLICATIONS

Multiple input displays

Projectors

A/V receivers

Set-top boxes

Advanced television (HDTV) sets

TA= 27°C, AVCC = 3.3 V, VTTI = 3.3 V, VTTO = 3.3 V, DVCC = 3.3 V, AMUXVCC = 5 V, AVEE = 0 V, DVEE = 0 V, differential input swing = 1000 mV, TMDS outputs terminated with external 50 Ω resistors to 3.3 V, unless otherwise noted.