AD9204開(kāi)發(fā)板套件編程器的評(píng)估板-模數(shù)轉(zhuǎn)換器（ADC）規(guī)格書(shū)PDF中文資料

AD9204屬于開(kāi)發(fā)板套件編程器的評(píng)估板-模數(shù)轉(zhuǎn)換器（ADC）。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的AD9204評(píng)估板 - 模數(shù)轉(zhuǎn)換器（ADC）模數(shù)轉(zhuǎn)換器 (ADC) 評(píng)估板是預(yù)裝有元器件的電路板，用于提供特定 ADC 或器件工作實(shí)例。特定板上的 A/D 轉(zhuǎn)換器數(shù)量從 3 到 32 不等，每秒采樣率從 2.5 kHz 到 26 GHz 不等，輸入電壓范圍從 0 到 8 Vp-p。

GENERAL DESCRIPTION

The AD9204 is a monolithic, dual-channel, 1.8 V supply, 10-bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS analog-to-digital converter (ADC). It features a high performance sample-and-hold circuit and on-chip voltage reference.

FEATURES

1.8 V analog supply operation

1.8 V to 3.3 V output supply

SNR

61.3 dBFS at 9.7 MHz input

61.0 dBFS at 200 MHz input

SFDR

75 dBc at 9.7 MHz input

73 dBc at 200 MHz input

Low power

30 mW per channel at 20 MSPS

63 mW per channel at 80 MSPS

Differential input with 700 MHz bandwidth

On-chip voltage reference and sample-and-hold circuit

DNL = ±0.11 LSB

Serial port control options

Scalable analog input: 1 V p-p to 2 V p-p differential

Offset binary, gray code, or twos complement data format

Optional clock duty cycle stabilizer

Integer 1-to-8 input clock divider

Built-in selectable digital test pattern generation

Energy-saving power-down modes

Data clock out with programmable clock and data alignment

APPLICATIONS

Communications

Diversity radio systems

Multimode digital receivers GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA

I/Q demodulation systems

Smart antenna systems

Battery-powered instruments

Handheld scope meters

Ultrasound

Radar/LIDAR

PET/SPECT imaging