AD9551BCPZ集成電路（IC）的時鐘發(fā)生器PLL頻率合成器規(guī)格書PDF中文資料

AD9551BCPZ屬于集成電路（IC）的時鐘發(fā)生器PLL頻率合成器。由亞德諾半導體技術(shù)有限公司制造生產(chǎn)的AD9551BCPZ時鐘發(fā)生器，PLL，頻率合成器時鐘發(fā)生器、PLL 和頻率合成器集成電路 (IC) 可為邏輯器件提供參考信號的穩(wěn)定定時脈沖，這些器件包括計算機、微控制器、數(shù)據(jù)通信系統(tǒng)和圖形/視頻發(fā)生器。這些集成電路可能包括緩沖器、驅(qū)動器、分頻器、倍頻器、多路復(fù)用器、合成器、扇出分配器和預(yù)分頻器。

GENERAL DESCRIPTION

The AD9551 accepts one or two reference input signals to synthesize one or two output signals. The AD9551 uses a fractional-N PLL that precisely translates the reference frequency to the desired output frequency. The input receivers and output drivers provide both single-ended and differential operation.

FEATURES

Translation between any two standard network rates

Dual reference inputs and dual clock outputs

Pin programmable for standard network rate translation

SPI programmable for arbitrary rational rate translation

Output frequencies from 10 MHz to 900 MHz

Input frequencies from 19.44 MHz to 806 MHz

On-chip VCO

Meets OC-192 high band jitter generation requirement

Supports standard forward error correction (FEC) rates

Supports holdover operation

Supports hitless switchover and phase build-out (even with

unequal reference frequencies)

SPI-compatible 3-wire programming interface

Single supply (3.3 V)

APPLICATIONS

Multiservice switches

Multiservice routers

Exact network clock frequency translation

General-purpose frequency translation