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ADCMP561BRQ中文資料亞德諾數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

ADCMP561BRQ
廠商型號(hào)

ADCMP561BRQ

功能描述

Dual High Speed PECL Comparators

文件大小

335.06 Kbytes

頁(yè)面數(shù)量

16 頁(yè)

生產(chǎn)廠商 Analog Devices
企業(yè)簡(jiǎn)稱(chēng)

AD亞德諾

中文名稱(chēng)

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更新時(shí)間

2025-5-27 23:01:00

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ADCMP561BRQ規(guī)格書(shū)詳情

GENERAL DESCRIPTION

The ADCMP561/ADCMP562 are high speed comparators fabricated on Analog Devices’ proprietary XFCB process. The devices feature a 700 ps propagation delay with less than 75 ps overdrive dispersion. Dispersion, a measure of the difference in propagation delay under differing overdrive conditions, is a particularly important characteristic of comparators. A separate programmable hysteresis pin is available on the ADCMP562.

A differential input stage permits consistent propagation delay with a wide variety of signals in the common-mode range from ?2.0 V to +3.0 V. Outputs are complementary digital signals that are fully compatible with PECL 10 K and 10 KH logic families. The outputs provide sufficient drive current to directly drive transmission lines terminated in 50 ? to VDD ? 2 V. A latch input, which is included, permits tracking, track-and-hold, or sample-and-hold modes of operation. The latch input pins contain internal pull-ups that set the latch in tracking mode when left open.

The ADCMP561/ADCMP562 are specified over the industrial temperature range (?40°C to +85°C).

FEATURES

Differential PECL compatible outputs

700 ps propagation delay input to output

75 ps propagation delay dispersion

Input common-mode range: –2.0 V to +3.0 V

Robust input protection

Differential latch control

Internal latch pull-up resistors

Power supply rejection greater than 85 dB

700 ps minimum pulse width

1.5 GHz equivalent input rise time bandwidth

Typical output rise/fall time of 500 ps

ESD protection > 4kV HBM, >200V MM

Programmable hysteresis

APPLICATIONS

Automatic test equipment

High speed instrumentation

Scope and logic analyzer front ends

Window comparators

High speed line receivers

Threshold detection

Peak detection

High speed triggers

Patient diagnostics

Disk drive read channel detection

Hand-held test instruments

Zero-crossing detectors

Line receivers and signal restoration

Clock drivers

產(chǎn)品屬性

  • 型號(hào):

    ADCMP561BRQ

  • 功能描述:

    IC COMP PECL DUAL HS 16-QSOP

  • RoHS:

  • 類(lèi)別:

    集成電路(IC) >> 線(xiàn)性 - 比較器

  • 系列:

    -

  • 產(chǎn)品培訓(xùn)模塊:

    Lead(SnPb) Finish for COTS Obsolescence Mitigation Program

  • 標(biāo)準(zhǔn)包裝:

    2,500

  • 類(lèi)型:

    通用

  • 元件數(shù):

    1

  • 輸出類(lèi)型:

    CMOS,推挽式,滿(mǎn)擺幅,TTL 電壓 -

  • 電源,單路/雙路(±):

    2.5 V ~ 5.5 V,±1.25 V ~ 2.75 V 電壓 -

  • 輸入偏移(最小值):

    5mV @ 5.5V 電流 -

  • 輸入偏壓(最小值):

    1pA @ 5.5V 電流 -

  • 輸出(標(biāo)準(zhǔn)):

    - 電流 -

  • 靜態(tài)(最大值):

    24µA CMRR,

  • PSRR(標(biāo)準(zhǔn)):

    80dB CMRR,80dB PSRR

  • 傳輸延遲(最大):

    450ns

  • 磁滯:

    ±3mV

  • 工作溫度:

    -40°C ~ 85°C

  • 封裝/外殼:

    6-WFBGA,CSPBGA

  • 安裝類(lèi)型:

    表面貼裝

  • 包裝:

    管件

  • 其它名稱(chēng):

    Q3554586

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