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ADCMP561BRQ中文資料亞德諾數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

廠商型號(hào) |
ADCMP561BRQ |
功能描述 | Dual High Speed PECL Comparators |
文件大小 |
335.06 Kbytes |
頁(yè)面數(shù)量 |
16 頁(yè) |
生產(chǎn)廠商 | Analog Devices |
企業(yè)簡(jiǎn)稱(chēng) |
AD【亞德諾】 |
中文名稱(chēng) | 亞德諾半導(dǎo)體技術(shù)有限公司官網(wǎng) |
原廠標(biāo)識(shí) | ![]() |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2025-5-27 23:01:00 |
人工找貨 | ADCMP561BRQ價(jià)格和庫(kù)存,歡迎聯(lián)系客服免費(fèi)人工找貨 |
ADCMP561BRQ規(guī)格書(shū)詳情
GENERAL DESCRIPTION
The ADCMP561/ADCMP562 are high speed comparators fabricated on Analog Devices’ proprietary XFCB process. The devices feature a 700 ps propagation delay with less than 75 ps overdrive dispersion. Dispersion, a measure of the difference in propagation delay under differing overdrive conditions, is a particularly important characteristic of comparators. A separate programmable hysteresis pin is available on the ADCMP562.
A differential input stage permits consistent propagation delay with a wide variety of signals in the common-mode range from ?2.0 V to +3.0 V. Outputs are complementary digital signals that are fully compatible with PECL 10 K and 10 KH logic families. The outputs provide sufficient drive current to directly drive transmission lines terminated in 50 ? to VDD ? 2 V. A latch input, which is included, permits tracking, track-and-hold, or sample-and-hold modes of operation. The latch input pins contain internal pull-ups that set the latch in tracking mode when left open.
The ADCMP561/ADCMP562 are specified over the industrial temperature range (?40°C to +85°C).
FEATURES
Differential PECL compatible outputs
700 ps propagation delay input to output
75 ps propagation delay dispersion
Input common-mode range: –2.0 V to +3.0 V
Robust input protection
Differential latch control
Internal latch pull-up resistors
Power supply rejection greater than 85 dB
700 ps minimum pulse width
1.5 GHz equivalent input rise time bandwidth
Typical output rise/fall time of 500 ps
ESD protection > 4kV HBM, >200V MM
Programmable hysteresis
APPLICATIONS
Automatic test equipment
High speed instrumentation
Scope and logic analyzer front ends
Window comparators
High speed line receivers
Threshold detection
Peak detection
High speed triggers
Patient diagnostics
Disk drive read channel detection
Hand-held test instruments
Zero-crossing detectors
Line receivers and signal restoration
Clock drivers
產(chǎn)品屬性
- 型號(hào):
ADCMP561BRQ
- 功能描述:
IC COMP PECL DUAL HS 16-QSOP
- RoHS:
否
- 類(lèi)別:
集成電路(IC) >> 線(xiàn)性 - 比較器
- 系列:
-
- 產(chǎn)品培訓(xùn)模塊:
Lead(SnPb) Finish for COTS Obsolescence Mitigation Program
- 標(biāo)準(zhǔn)包裝:
2,500
- 類(lèi)型:
通用
- 元件數(shù):
1
- 輸出類(lèi)型:
CMOS,推挽式,滿(mǎn)擺幅,TTL 電壓 -
- 電源,單路/雙路(±):
2.5 V ~ 5.5 V,±1.25 V ~ 2.75 V 電壓 -
- 輸入偏移(最小值):
5mV @ 5.5V 電流 -
- 輸入偏壓(最小值):
1pA @ 5.5V 電流 -
- 輸出(標(biāo)準(zhǔn)):
- 電流 -
- 靜態(tài)(最大值):
24µA CMRR,
- PSRR(標(biāo)準(zhǔn)):
80dB CMRR,80dB PSRR
- 傳輸延遲(最大):
450ns
- 磁滯:
±3mV
- 工作溫度:
-40°C ~ 85°C
- 封裝/外殼:
6-WFBGA,CSPBGA
- 安裝類(lèi)型:
表面貼裝
- 包裝:
管件
- 其它名稱(chēng):
Q3554586
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
ADI(亞德諾) |
24+ |
NA/ |
8735 |
原廠直銷(xiāo),現(xiàn)貨供應(yīng),賬期支持! |
詢(xún)價(jià) | ||
ADI(亞德諾) |
24+ |
QSOP16 |
7350 |
原裝進(jìn)口,原廠直銷(xiāo)!當(dāng)天可交貨,支持原型號(hào)開(kāi)票! |
詢(xún)價(jià) | ||
ADI(亞德諾) |
23+ |
NA |
20094 |
正納10年以上分銷(xiāo)經(jīng)驗(yàn)原裝進(jìn)口正品做服務(wù)做口碑有支持 |
詢(xún)價(jià) | ||
ADI(亞德諾)/LINEAR(凌特) |
2024+ |
QSOP-16-150mil |
500000 |
誠(chéng)信服務(wù),絕對(duì)原裝原盤(pán) |
詢(xún)價(jià) | ||
ADI/亞德諾 |
23+ |
QSOP-16 |
12700 |
買(mǎi)原裝認(rèn)準(zhǔn)中賽美 |
詢(xún)價(jià) | ||
Analog Devices Inc. |
25+ |
表面貼裝型 |
9350 |
獨(dú)立分銷(xiāo)商 公司只做原裝 誠(chéng)心經(jīng)營(yíng) 免費(fèi)試樣正品保證 |
詢(xún)價(jià) | ||
AD |
23+ |
原廠原包 |
19960 |
只做進(jìn)口原裝 終端工廠免費(fèi)送樣 |
詢(xún)價(jià) | ||
ADI |
24+ |
16-Lead QSOP |
3660 |
十年信譽(yù),只做全新原裝正品現(xiàn)貨,以?xún)?yōu)勢(shì)說(shuō)話(huà) !! |
詢(xún)價(jià) | ||
ADI |
20+ |
16SSOP |
33680 |
ADI全新原裝-可開(kāi)原型號(hào)增稅票 |
詢(xún)價(jià) | ||
ADI/亞德諾 |
23+ |
QSOP-16 |
25630 |
原裝正品 |
詢(xún)價(jià) |