ALD4501SE集成電路（IC）的可編程定時器振蕩器規(guī)格書PDF中文資料

GENERAL DESCRIPTION

The ALD4501 timer is a high performance QUAD monolithic timing circuit built with advanced silicon gate CMOS technology. It offers the benefits of high input impedance, thereby allowing smaller timing capacitors and longer timing cycle; high speed with typical cycle time of 500ns; low power dissipation for battery operated environment; and reduced supply current spikes allowing smaller and lower cost decoupling capacitors. Each of the four timers can be independently operated in either the monostable, astable, or 50 duty cycle mode.

FEATURES

? High speed operation -- 2MHz typical oscillation at 5V

? Each discharge output sinking current: 40mA at 5V

? Guaranteed low operating supply voltage of 2 to 12V

? Each timer is functionally equivalent to NE555 with greatly expanded high and low frequency ranges

? High speed, low power, monolithic CMOS technology

? Low supply current 150μA typical

? Extremely low trigger, threshold and reset currents -- 10pA typical

? Operates in both monostable and astable modes

? Fixed 50 duty cycle or adjustable duty cycle

? CMOS, NMOS and TTL compatible input/output

? Low supply current spikes

APPLICATIONS.

? High speed one-shot (monostable) pulse generation

? Precision timing

? Sequential timing

? Long delay timer

? Pulse width and pulse position modulation

? Missing pulse detector

? Frequency divider

? Synchronized timer