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C8051F96X中文資料SILABS數(shù)據(jù)手冊PDF規(guī)格書

C8051F96X
廠商型號

C8051F96X

功能描述

Ultra-Low-Power, High-Efficiency, Battery-Powered Metering MCU

文件大小

53.75 Kbytes

頁面數(shù)量

2

生產(chǎn)廠商 Silicon Laboratories
企業(yè)簡稱

SILABS

中文名稱

Silicon Laboratories官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2025-2-14 18:30:00

C8051F96X規(guī)格書詳情

Ultra-Low Power @ 3.6 V

- 110 μA/MHz, Low-Power Active, DC-DC enabled

- 110 nA sleep current with data retention; POR monitor enabled

- 400 nA sleep current with smaRTClock (internal LFO)

- 700 nA sleep current with smaRTClock (external XTAL)

- 2 μs wake-up from any sleep mode

12-Bit; 16 ch. Analog to Digital Converter

- Up to 75 ksps, 12-bit mode or 300 ksps 10-bit mode

- External pin or internal VREF (no external capacitor required)

- On-chip PGA allows measuring voltages up to twice the reference voltage

- Autonomous burst mode with 16-bit automatic averaging accumulator

- Integrated temperature sensor

Two Low Current Comparators

- Programmable hysteresis and response time

- Configurable as interrupt or reset source

Internal 6-Bit Current Reference

- Up to ±500 μA; source and sink capability

- Enhanced resolution via PWM interpolation

Integrated LCD Controller

- Supports up to 128 segments (32x4)

- Integrated charge pump for contrast control

Metering-Specific Peripherals

- DC-DC buck converter allows dynamic voltage scaling for maximum efficiency (250 mW output)

- Sleep-mode pulse accumulator with programmable switch de-bounce and pull-up control interfaces directly to metering sensor

- Data Packet Processing Engine (DPPE) includes hardware AES, DMA, CRC, and encoding blocks for acceleration of wire less protocols

- Manchester and Three-out-of-Six encoder hardware for power efficient implementation of the wireless M-bus specification

High-Speed Enhanced 8051 μC Core

- Pipe-lined instruction architecture executes 70 of instructions in 1 or 2 system clocks

Memory

- Up to 128 kB Flash; In-system programmable; Full read/write/ erase functionality over the entire supply range

- Up to 8 kB data retention RAM

Digital Peripherals

- Up to 57 port I/O; All 5 V tolerant with programmable drive strength

- Hardware enhanced UART, 2 SPI and I2C serial ports available concurrently

- Four general-purpose 16-bit counter/timers

- 16-bit programmable counter array (PCA) with six capture/compare/PWM modules and watchdog timer

Clock Sources

- Precision internal oscillators: 24.5 MHz with ±2 accuracy supports UART operation; spread-spectrum mode for reduced EMI

- Low power internal oscillator: 20 MHz

- External oscillator: Crystal, RC, C, CMOS clock

- SmaRTClock oscillator: 32.768 kHz crystal or 16.4 kHz internal LFO with three independent alarms

On-Chip Debug

- On-chip debug circuitry facilitates full speed, non-intrusive in system debug (no emulator required)

- Provides four breakpoints, single stepping

Package Options

- 76-pin DQFN (6x6 mm), RoHS compliant

- 40-pin QFN (6x6 mm), RoHS compliant

- 80-pin QFP (12x12 mm), RoHS compliant

Development Kit: C8051F960DK

Supply Voltage: 1.8 to 3.8 V

Temperature Range: –40 to +85 °C

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