CAT5261YI00中文資料安森美半導體數(shù)據(jù)手冊PDF規(guī)格書

Description

The CAT5261 is two digital POTs integrated with control logic and 8 bytes of NVRAM memory. Each digital POT consists of a series of resistive elements connected between two externally accessible end points. The tap points between each resistive element are connected to the wiper outputs with CMOS switches. A separate 8-bit control register (WCR) independently controls the wiper tap switches for each digital POT. Associated with each wiper control register are four 8-bit non-volatile memory data registers (DR) used for storing up to four wiper settings. Writing to the wiper control register or any of the non-volatile data registers is via a SPI serial bus. On power-up, the contents of the first data register (DR0) for each of the potentiometers is automatically loaded into its respective wiper control register.

Features

? Two Linear-taper Digital Potentiometers

? 256 Resistor Taps per Potentiometer

? End to End Resistance 50 kΩ or 100 kΩ

? Potentiometer Control and Memory Access via SPI Interface

? Low Wiper Resistance, Typically 100 Ω

? Nonvolatile Memory Storage for up to Four Wiper Settings for Each Potentiometer

? Automatic Recall of Saved Wiper Settings at Power Up

? 2.5 to 6.0 Volt Operation

? Standby Current less than 1 μA

? 1,000,000 Nonvolatile WRITE Cycles

? 100 Year Nonvolatile Memory Data Retention

? 24-lead SOIC and 24-lead TSSOP

? Industrial Temperature Range

? These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS Compliant