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CD4053BMS中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

CD4053BMS
廠商型號

CD4053BMS

功能描述

CMOS Analog Multiplexers/Demultiplexers*

文件大小

452.99 Kbytes

頁面數(shù)量

12

生產(chǎn)廠商 Renesas Technology Corp
企業(yè)簡稱

RENESAS瑞薩

中文名稱

瑞薩科技有限公司官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2025-2-12 9:05:00

CD4053BMS規(guī)格書詳情

Features

? Logic Level Conversion

? High-Voltage Types (20V Rating)

? CD4051BMS Signal 8-Channel

? CD4052BMS Differential 4-Channel

? CD4053BMS Triple 2-Channel

? Wide Range of Digital and Analog Signal Levels:

- Digital 3V to 20V

- Analog to 20Vp-p

? Low ON Resistance: 125? (typ) Over 15Vp-p Signal

Input Range for VDD - VEE = 15V

? High OFF Resistance: Channel Leakage of ?100pA

(typ) at VDD - VEE = 18V

? Logic Level Conversion:

- Digital Addressing Signals of 3V to 20V (VDD - VSS

= 3V to 20V)

- Switch Analog Signals to 20Vp-p (VDD - VEE = 20V);

See Introductory Text

? Matched Switch Characteristics: RON = 5? (typ) for

VDD - VEE = 15V

? Very Low Quiescent Power Dissipation Under All Digital Control Input and Supply Conditions: 0.2?W (typ)

at VDD - VSS = VDD - VEE = 10V

? Binary Address Decoding on Chip

? 5V, 10V and 15V Parametric Ratings

? 100 Tested for Quiescent Current at 20V

? Maximum Input Current of 1?A at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC

? Break-Before-Making Switching Eliminates Channel

Overlap

Description

CD4051BMS, CD4052BMS and CD4053BMS analog multiplexers/demultiplexers are digitally controlled analog

switches having low ON impedance and very low OFF leakage current. Control of analog signals up to 20V peak-topeak can be achieved by digital signal amplitudes of 4.5V to

20V (if VDD-VSS = 3V, a VDD-VEE of up to 13V can be controlled; for VDD-VEE level differences above 13V, a VDDVSS of at least 4.5V is required). For example, if VDD =

+4.5V, VSS = 0, and VEE = -13.5V, analog signals from -

13.5V to +4.5V can be controlled by digital inputs of 0 to 5V.

These multiplexer circuits dissipate extremely low quiescent

power over the full VDD-VSS and VDD-VEE supply voltage

ranges, independent of the logic state of the control signals.

When a logic “1” is present at the inhibit input terminal all

channels are off.

The CD4051BMS is a single 8 channel multiplexer having

three binary control inputs, A, B, and C, and an inhibit input.

The three binary signals select 1 of 8 channels to be turned

on, and connect one of the 8 inputs to the output.

The CD4052BMS is a differential 4 channel multiplexer having two binary control inputs, A and B, and an inhibit input.

The two binary input signals select 1 of 4 pairs of channels to

be turned on and connect the analog inputs to the outputs.

The CD4053BMS is a triple 2 channel multiplexer having

three separate digital control inputs, A, B, and C, and an

inhibit input. Each control input selects one of a pair of channels which are connected in a single pole double-throw configuration.

The CD4051BMS, CD4052BMS and CD4053BMS are supplied

in these 16 lead outline packages:

Braze Seal DIP *H4X ?H4T

Frit Seal DIP H1E

Ceramic Flatpack H6W

*CD4051B Only ?CD4052B, CD4053 Only

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