CP1121中文資料ETC數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

廠商型號(hào) |
CP1121 |
功能描述 | 21 Channel E1/T1 Mapper |
文件大小 |
148.83 Kbytes |
頁(yè)面數(shù)量 |
3 頁(yè) |
生產(chǎn)廠商 | List of Unclassifed Manufacturers |
企業(yè)簡(jiǎn)稱(chēng) |
ETC |
中文名稱(chēng) | 未分類(lèi)制造商 |
原廠標(biāo)識(shí) | ![]() |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2025-5-18 17:10:00 |
人工找貨 | CP1121價(jià)格和庫(kù)存,歡迎聯(lián)系客服免費(fèi)人工找貨 |
CP1121規(guī)格書(shū)詳情
FEATURES
Configurable receive and transmit TU12 time-slots via microprocessor
Detects loss of input clock on Telecom Interprets TU12 pointer according to G.783 (2000/10) and G.707 (2000/10)
Detects LOM, TU-LOP and TU-AIS alarms
Detects Remote Defect Indication (RDI), Remote Error Indication (REI), RFI alarm and Path Label Mismatch
(PLM) alarm
Provides 12-bit performance counters for BIP-2 errors and 11-bit performance counters for tributary REI errors
Detects degraded signals(DEG) and Excessive Error defects (EXC) based on received BIP-2 errors.
Extracts the 16-byte J2 sequence into microprocessor accessible registers, and checks the J2 sequence to detect
TIM alarm
Detects the K4 (bit5-bit7) and V5 bit8 for Enhanced Defect Indicator (E-RDI)
Captures filtered K4 byte into microprocessor accessible registers
Extracts V5 and K4 bytes into microprocessor accessible registers
Extracts N2 byte and O bits into microprocessor accessible registers
Supports1+1 Path-protection
Integrated bit-leaking circuit and DPLL
The output jitter of E1/T1 data (either mapping jitter or combined jitter) is compliant with G.783 (2000/10)
E1/T1 Port #0 to Port #7 can be configured to work in re-timing mode
Supports the code-rate adjustment
Optionally inserts VC-AIS and TU-AIS into upstream data
Generates the TU12 pointer (V1, V2) per ITU G.783
The TU12 pointer value is fixed on 105
Calculates the BIP-2 and inserts into outgoing data stream, optionally inserts single or continued BIP-2 errors
Inserts RDI/REI from either internal generation or microprocessor
Inserts 16-byte programmable J2 sequence
Inserts E-RDI from either internal generation or microprocessor
Inserts programmable N2 byte and O bits
Controlled High-Z output on transmit Telecom Bus
Provides three bus timing modes for transmit Telecom Bus
Build-in PRBS test function can be configured to any one of all 21 E1/T1 ports
Provides 16-bit Intel/Motorola microprocessor interface
3.3V supply with 5V tolerant I/O
IEEE 1149.1 JTAG boundary scan
Maximum power less than 1.0 Watt
Operating industrial temperature range: -40℃ ~ 85℃
PBGA256 package
APPLICATIONS
SDH Add/Drop Multiplexers
SDH Terminal Multiplexers
Multi-service Transport Platform (MSTP)
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
CHIPHOM/啟攀微 |
24+ |
BGA |
880000 |
明嘉萊只做原裝正品現(xiàn)貨 |
詢(xún)價(jià) | ||
CHIP |
24+ |
BGA |
23000 |
免費(fèi)送樣原盒原包現(xiàn)貨一手渠道聯(lián)系 |
詢(xún)價(jià) | ||
CHIPHOMER |
24+ |
BGA |
56000 |
公司進(jìn)口原裝現(xiàn)貨 批量特價(jià)支持 |
詢(xún)價(jià) | ||
HOMERHP |
2023+ |
BGA |
8700 |
原裝現(xiàn)貨 |
詢(xún)價(jià) | ||
啟攀微 |
1340 |
81 |
詢(xún)價(jià) | ||||
CHIP |
05+ |
BGA |
546 |
一級(jí)代理,專(zhuān)注軍工、汽車(chē)、醫(yī)療、工業(yè)、新能源、電力 |
詢(xún)價(jià) | ||
CHIP |
05+ |
BGA |
25 |
原裝現(xiàn)貨海量庫(kù)存歡迎咨詢(xún) |
詢(xún)價(jià) | ||
CHIP |
21+ |
BGA |
1092 |
原裝現(xiàn)貨假一賠十 |
詢(xún)價(jià) | ||
CENTRAL |
24+ |
DO-214AA |
9987 |
公司現(xiàn)貨庫(kù)存,支持實(shí)單 |
詢(xún)價(jià) | ||
CHIP |
23+ |
BGA |
1092 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢(xún)價(jià) |