CY7C68001-56LFC中文資料賽普拉斯數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

Introduction

The EZ-USB SX2? USB interface device is designed to work with any external master, such as standard microprocessors, DSPs, ASICs, and FPGAs to enable USB 2.0 support for any peripheral design. SX2 has a built in USB transceiver and Seria Interface Engine (SIE), along with a command decoder for sending and receiving USB data. The controller has four endpoints that share a 4 KB FIFO space for maximum flexibility and throughput, and Control Endpoint 0. SX2 has three address pins and a selectable 8- or 16- bit data bus for command and data input or output.

Features

■ USB 2.0-Certified Compliant

? On the USB-IF Integrators List: Test ID Number 40000713

■ Operates at High (480 Mbps) or Full (12 Mbps) Speed

■ Supports Control Endpoint 0:

? Used for handling USB device requests

■ Supports Four Configurable Endpoints that share a 4-KB FIFO Space

? Endpoints 2, 4, 6, 8 for application-specific control and data

■ Standard 8- or 16-bit External Master Interface

? Glueless interface to most standard microprocessors DSPs, ASICs, and FPGAs

? Synchronous or Asynchronous interface

■ Integrated Phase-locked Loop (PLL)

■ 3.3V Operation, 5V Tolerant I/Os

■ 56-pin SSOP and QFN Package

■ Complies with most Device Class Specifications

Applications

■ DSL modems

■ ATA interface

■ Memory card readers

■ Legacy conversion devices

■ Cameras

■ Scanners

■ Home PNA

■ Wireless LAN

■ MP3 players

■ Networking

■ Printers