DP8051XP中文資料DCD數(shù)據(jù)手冊PDF規(guī)格書

OVERVIEW

DP8051 is an ultra high performance, speed optimized soft core of a single-chip 8-bit embedded controller dedicated for operation with fast (typically on-chip) and slow (off chip) memories. The core has been designed with a special concern about performance to power consumption ratio. This ratio is extended by an advanced power management unit PMU.

DP8051 soft core is 100 binary compatible with the industry standard 8051 8-bit microcontroller. There are two configurations of DP8051: Harward where internal data and program buses are separated, and von Neumann with common program and external data bus. DP8051 has Pipelined RISC architecture 10 times faster compared to standard architecture and executes 85-200 million in structions per second. This performance can also be exploited to great advantage in low power applications where the core can be clocked over ten times more slowly than the original implementation for no performance penalty.

DP8051 is delivered with fully automated testbench and complete set of tests allowing easy package validation at each stage of SoC

design flow.

CPU FEATURES

● 100 software compatible with industry standard 8051

● Pipelined RISC architecture enables to execute instructions

10 times faster com pared to standard 8051

● 24 times faster multiplication

● 12 times faster addition

● Up to 256 bytes of internal (on-chip) Data Memory

● Up to 64K bytes of internal (on-chip) or external (off-chip) Program Memory

● Up to 16M bytes of external (off-chip) Data Memory

● User programmable Program Memory Wait States solution for wide range of memories speed

● User programmable External Data Memory Wait States solution for wide range of

memories speed

● De-multiplexed Address/Data bus to allow easy connection to memory

● Dedicated signal for Program Memory writes.

● Interface for additional Special Function Registers

● Fully synthesizable, static synchronous design with

positive edge clocking and no internal tri-states

● Scan test ready

● 2.0 GHz virtual clock frequency in a 0.35u technological process