DS21Q41B集成電路（IC）的電信規(guī)格書PDF中文資料

DESCRIPTION

The DS21Q41B combines four of the popular DS2141A T1 Controllers onto a single monolithic die. The “B” designation denotes that some new features are available in the Quad version that were not available in the single T1 device. The added features in the DS21Q41B are listed in Section 1. The DS21Q41B offers a substantial space savings to applications that require more than one T1 framer on a card. The Quad version is only slightly bigger than the single T1 device. All four framers in the DS21Q41B are totally independent, they do not share a common framing synchronizer. Also, the transmit and receive sides of each framer are totally independent. The dual two–frame elastic stores contained in each of the four framers can be independently enabled and disabled as required. The DS21Q41B meets all of the latest specifications including ANSI T1.403 (and the emerging T1.403–199X), ANSI T1.231–1993, AT&T TR62411, AT&T TR54016, ITU G.704 and G.706.

FEATURES

? Four T1 DS1/ISDN–PRI framing transceivers

? All four framers are fully independent

? Frames to D4, ESF, and SLC–96 formats

? 8–bit parallel control port that can be connected to either multiplexed or non–multiplexed buses

? Each of the four framers contains dual two–frame elastic stores that can connect to asynchronous or synchronous backplanes up to 8.192 MHz

? Extracts and inserts robbed bit signaling

? Framer and payload loopbacks

? Large counters for BPVs, LCVs, EXZs, CRC6, PCVs, F–bit errors and the number of multiframes out of sync

? Contains ANSI ones density monitor and enforcer

? CSU loop code generator and detector

? Programmable output clocks for Fractional T1, ISDN–PRI, Actual Size and per channel loopback applications

? Onboard FDL support circuitry

? Pin compatible with DS21Q43 Quad E1 Framer

? 5V supply; low power CMOS

? Available in 128–pin TQFP

? Industrial (–40°C to +85°C) grade version available (DS21Q41BTN)