DS2460S+SLASHTR中文資料亞德諾數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

GENERAL DESCRIPTION

The DS2460 SHA-1 Coprocessor with EEPROM is a hardware implementation of the ISO/IEC 10118-3 Secure Hash Algorithm (SHA-1), eliminating the need to develop software to perform the complex SHA computation required for authenticating SHA devices and for performing the validation of digitally signed service data. The DS2460 communicates with a microcontroller through the popular I2C interface. Applications include hosts of access control and electronic payment systems for token authentication and service data validation as well as generation of one-time-use encryption keys for short message encryption and decryption for messages not exceeding the length of a SHA-1 result, which is 20 bytes.

FEATURES

Dedicated Hardware-Accelerated SHA Engine for Generating SHA-1 MACs

112 Bytes User EEPROM for Storing End Equipment Property Data

I2C Host Interface, Supports 100kHz and 400kHz Communication Speeds

Three Address Inputs for I2C Address Assignment

Single-Byte to 8-Byte EEPROM Write Sequences

64-Bit Unique Registration Number

EEPROM Endurance: 200k Cycles per 8-Byte Block at 25°C

10ms max EEPROM Write Cycle

Wide Operating Range: 2.7V to 5.5V, -40°C to +85°C

±4kV IEC 1000-4-2 ESD Protection Level on All Pins

8-Pin SO (150 mils) Package

APPLICATIONS

License Management

Secure Feature Control

System Authentication

Clone Prevention

Door Locks

Utility Meters