FG896RF/IF射頻/中頻RFID的RF天線規(guī)格書PDF中文資料
| 廠商型號 |
FG896 |
| 參數(shù)屬性 | FG896 包裝為散裝；類別為RF/IF射頻/中頻RFID的RF天線；產(chǎn)品描述：RF ANT 898MHZ WHIP STR N FEM |
| 功能描述 | Military ProASIC3/EL Low Power Flash FPGAs with Flash*Freeze Technology |
| 文件大小 |
10.50173 Mbytes |
| 頁面數(shù)量 |
212 頁 |
| 生產(chǎn)廠商 | Microsemi Corporation |
| 企業(yè)簡稱 |
Microsemi【美高森美】 |
| 中文名稱 | 美高森美公司官網(wǎng) |
| 原廠標(biāo)識 |  |
| 數(shù)據(jù)手冊 | |
| 更新時(shí)間 | 2025-2-6 23:00:00 |
FG896規(guī)格書詳情
Features and Benefits
High Capacity
? 15 k to 1 M System Gates
? Up to 144 kbits of True Dual-Port SRAM
? Up to 300 User I/Os
Reprogrammable Flash Technology
? 130-nm, 7-Layer Metal (6 Copper), Flash-Based CMOS Process
? Instant On Level 0 Support
? Single-Chip Solution
? Retains Programmed Design when Powered Off
High Performance
? 350 MHz System Performance
? 3.3 V, 66 MHz 64-Bit PCI?
In-System Programming (ISP) and Security
? ISP Using On-Chip 128-Bit Advanced Encryption Standard (AES) Decryption (except ARM?-enabled ProASIC?3 devices) via JTAG (IEEE 1532–compliant)?
? FlashLock? to Secure FPGA Contents
Low Power
? Core Voltage for Low Power
? Support for 1.5 V-Only Systems
? Low-Impedance Flash Switches
High-Performance Routing Hierarchy
? Segmented, Hierarchical Routing and Clock Structure
Advanced I/O
? 700 Mbps DDR, LVDS-Capable I/Os (A3P250 and above)
? 1.5 V, 1.8 V, 2.5 V, and 3.3 V Mixed-Voltage Operation
? Wide Range Power Supply Voltage Support per JESD8-B, Allowing I/Os to Operate from 2.7 V to 3.6 V
? Bank-Selectable I/O Voltages—up to 4 Banks per Chip
? Single-Ended I/O Standards: LVTTL, LVCMOS 3.3 V / 2.5 V / 1.8 V / 1.5 V, 3.3 V PCI / 3.3 V PCI-X? and LVCMOS 2.5 V / 5.0 V Input
? Differential I/O Standards: LVPECL, LVDS, B-LVDS, and M-LVDS (A3P250 and above)
? I/O Registers on Input, Output, and Enable Paths
? Hot-Swappable and Cold Sparing I/Os?
? Programmable Output Slew Rate? and Drive Strength
? Weak Pull-Up/-Down
? IEEE 1149.1 (JTAG) Boundary Scan Test
? Pin-Compatible Packages across the ProASIC3 Family
Clock Conditioning Circuit (CCC) and PLL?
? Six CCC Blocks, One with an Integrated PLL
? Configurable Phase-Shift, Multiply/Divide, Delay Capabilities and External Feedback
? Wide Input Frequency Range (1.5 MHz to 350 MHz)
Embedded Memory?
? 1 kbit of FlashROM User Nonvolatile Memory
? SRAMs and FIFOs with Variable-Aspect-Ratio 4,608-Bit RAM Blocks (×1, ×2, ×4, ×9, and ×18 organizations)?
? True Dual-Port SRAM (except ×18)
ARM Processor Support in ProASIC3 FPGAs
? M1 ProASIC3 Devices—ARM?Cortex?-M1 Soft Processor Available with or without Debug
產(chǎn)品屬性
- 產(chǎn)品編號：
FG8963
- 制造商：
TE Connectivity Laird
- 類別：
RF/IF，射頻/中頻和 RFID > RF 天線
- 包裝：
散裝
- 頻率組：
UHF（300MHz ~ 1GHz）
- 頻率（中心/帶）：
898MHz
- 頻率范圍：
896MHz ~ 940MHz
- 天線類型：
鞭狀，直形
- VSWR：
2
- 增益：
3dBd
- 端接：
N 型母頭
- 安裝類型：
支架安裝
- 高度（最大值）：
25.000"（635.00mm）
- 描述：
RF ANT 898MHZ WHIP STR N FEM
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