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HCS166D

Radiation Hardened 8-Bit Parallel-Input/Serial Output Shift Register

Description TheIntersilHCS166MSisan8-bitshiftregisterthathasfullysynchronousserialorparalleldataentryselectedbyanactiveLOWParallelEnable(PE)input.WhenthePEisLOWonesetuptimebeforetheLOW-to-HIGHclocktransition,paralleldataisenteredintotheregister.WhenP

Intersil

Intersil Corporation

HCS166D

Radiation Hardened 8-Bit Parallel-Input/Serial Output Shift Register

Features ?3MicronRadiationHardenedCMOSSOS ?TotalDose200KRAD(Si) ?SEPEffectiveLETNoUpsets:>100MEV-cm2/mg ?SingleEventUpset(SEU)Immunity1x1012RAD(Si)/s ?DoseRateUpset>1010RADs(Si)/s20nsPulse ?La

RENESASRenesas Technology Corp

瑞薩瑞薩科技有限公司

HCS166DMSR

Radiation Hardened 8-Bit Parallel-Input/Serial Output Shift Register

Description TheIntersilHCS166MSisan8-bitshiftregisterthathasfullysynchronousserialorparalleldataentryselectedbyanactiveLOWParallelEnable(PE)input.WhenthePEisLOWonesetuptimebeforetheLOW-to-HIGHclocktransition,paralleldataisenteredintotheregister.WhenP

Intersil

Intersil Corporation

HCS166DMSR

Radiation Hardened 8-Bit Parallel-Input/Serial Output Shift Register

Features ?3MicronRadiationHardenedCMOSSOS ?TotalDose200KRAD(Si) ?SEPEffectiveLETNoUpsets:>100MEV-cm2/mg ?SingleEventUpset(SEU)Immunity1x1012RAD(Si)/s ?DoseRateUpset>1010RADs(Si)/s20nsPulse ?La

RENESASRenesas Technology Corp

瑞薩瑞薩科技有限公司

HCS166HMSR

RadiationHardened8-BitParallel-Input/SerialOutputShiftRegister

Description TheIntersilHCS166MSisan8-bitshiftregisterthathasfullysynchronousserialorparalleldataentryselectedbyanactiveLOWParallelEnable(PE)input.WhenthePEisLOWonesetuptimebeforetheLOW-to-HIGHclocktransition,paralleldataisenteredintotheregister.WhenP

Intersil

Intersil Corporation

HCS166HMSR

RadiationHardened8-BitParallel-Input/SerialOutputShiftRegister

Features ?3MicronRadiationHardenedCMOSSOS ?TotalDose200KRAD(Si) ?SEPEffectiveLETNoUpsets:>100MEV-cm2/mg ?SingleEventUpset(SEU)Immunity1x1012RAD(Si)/s ?DoseRateUpset>1010RADs(Si)/s20nsPulse ?La

RENESASRenesas Technology Corp

瑞薩瑞薩科技有限公司

HCS166K

RadiationHardened8-BitParallel-Input/SerialOutputShiftRegister

Description TheIntersilHCS166MSisan8-bitshiftregisterthathasfullysynchronousserialorparalleldataentryselectedbyanactiveLOWParallelEnable(PE)input.WhenthePEisLOWonesetuptimebeforetheLOW-to-HIGHclocktransition,paralleldataisenteredintotheregister.WhenP

Intersil

Intersil Corporation

HCS166K

RadiationHardened8-BitParallel-Input/SerialOutputShiftRegister

Features ?3MicronRadiationHardenedCMOSSOS ?TotalDose200KRAD(Si) ?SEPEffectiveLETNoUpsets:>100MEV-cm2/mg ?SingleEventUpset(SEU)Immunity1x1012RAD(Si)/s ?DoseRateUpset>1010RADs(Si)/s20nsPulse ?La

RENESASRenesas Technology Corp

瑞薩瑞薩科技有限公司

HCS166KMSR

RadiationHardened8-BitParallel-Input/SerialOutputShiftRegister

Description TheIntersilHCS166MSisan8-bitshiftregisterthathasfullysynchronousserialorparalleldataentryselectedbyanactiveLOWParallelEnable(PE)input.WhenthePEisLOWonesetuptimebeforetheLOW-to-HIGHclocktransition,paralleldataisenteredintotheregister.WhenP

Intersil

Intersil Corporation

HCS166KMSR

RadiationHardened8-BitParallel-Input/SerialOutputShiftRegister

Features ?3MicronRadiationHardenedCMOSSOS ?TotalDose200KRAD(Si) ?SEPEffectiveLETNoUpsets:>100MEV-cm2/mg ?SingleEventUpset(SEU)Immunity1x1012RAD(Si)/s ?DoseRateUpset>1010RADs(Si)/s20nsPulse ?La

RENESASRenesas Technology Corp

瑞薩瑞薩科技有限公司

詳細(xì)參數(shù)

  • 型號(hào)：

    HCS166D

  • 制造商：

    INTERSIL

  • 制造商全稱：

    Intersil Corporation

  • 功能描述：

    Radiation Hardened 8-Bit Parallel-Input/Serial Output Shift Register

供應(yīng)商型號(hào)品牌批號(hào)封裝庫存備注價(jià)格
ISL
23+
65480
詢價(jià)
H
QQ咨詢
CDIP
69
全新原裝 研究所指定供貨商
 詢價(jià)
H
21+
CDIP
7655
軍用單位指定合供方/只做原裝,正品現(xiàn)貨
 詢價(jià)
N/A
2447
SMD
100500
一級(jí)代理專營品牌!原裝正品,優(yōu)勢現(xiàn)貨,長期排單到貨
 詢價(jià)
HAR
05+
原廠原裝
4380
只做全新原裝真實(shí)現(xiàn)貨供應(yīng)
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MICROCHIP
24+
SOP-8P
200
詢價(jià)
MICROCHIP
24+
SOP-8
2560
絕對(duì)原裝!現(xiàn)貨熱賣!
 詢價(jià)
MICROCHIP
17+
DIP/SOP
6200
100%原裝正品現(xiàn)貨
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MIC
23+
DIP-8
9280
價(jià)格優(yōu)勢/原裝現(xiàn)貨/客戶至上/歡迎廣大客戶來電查詢
 詢價(jià)
MIC
23+
DIP
5000
原裝正品,假一罰十
 詢價(jià)
更多HCS166D供應(yīng)商 更新時(shí)間2025-4-26 16:43:00

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