首頁(yè)>HD74HCT643>規(guī)格書(shū)詳情
HD74HCT643中文資料日立數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
| 廠商型號(hào) |
HD74HCT643 |
| 功能描述 | Octal Bus Transceivers (with 3-state outputs) |
| 文件大小 |
52.29 Kbytes |
| 頁(yè)面數(shù)量 |
7 頁(yè) |
| 生產(chǎn)廠商 | Hitachi Semiconductor |
| 企業(yè)簡(jiǎn)稱(chēng) |
Hitachi【日立】 |
| 中文名稱(chēng) | 日立公司官網(wǎng) |
| 原廠標(biāo)識(shí) |  |
| 數(shù)據(jù)手冊(cè) | |
| 更新時(shí)間 | 2025-5-25 16:50:00 |
| 人工找貨 | HD74HCT643價(jià)格和庫(kù)存，歡迎聯(lián)系客服免費(fèi)人工找貨 |
HD74HCT643規(guī)格書(shū)詳情
Description
Both the HD74HCT640 and the HD74HCT643 have one active low enable input (G), and a direction control (DIR). When the DIR input is high, data flows from the A inputs to the B outputs. When DIR is low, data flows from B to A.
The HD74HCT640 transfers inverted data from one bus to the other. The HD74HCT643 transfers inverted data from the A bus to the B bus and non-inverted data from the B bus to the A bus.
Features
? LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility
? High Speed Operation: tpd (A to B) = 14.5 ns typ (CL = 50 pF)
? High Output Current: Fanout of 15 LSTTL Loads
? Wide Operating Voltage: VCC = 4.5 to 5.5 V
? Low Input Current: 1 μA max
? Low Quiescent Supply Current: ICC (static) = 4 μA max (Ta = 25°C)
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
HIT |
25+23+ |
DIP |
24471 |
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詢價(jià) | ||
HIT |
24+ |
SOP |
501 |
詢價(jià) | |||
HITACHI |
24+ |
SOP5.2 |
80000 |
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詢價(jià) | ||
HITACHI |
01+ |
SOP |
2000 |
原裝現(xiàn)貨 |
詢價(jià) | ||
HITACHI |
23+ |
SOP-5.2MM |
58886 |
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詢價(jià) | ||
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96+ |
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1606 |
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2020+ |
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986 |
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詢價(jià) | ||
2023+ |
SMD |
3000 |
進(jìn)口原裝現(xiàn)貨 |
詢價(jià) | |||
HITACHI |
23+ |
SOP5.2 |
50000 |
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詢價(jià) | ||
HITACHI |
2016+ |
DIP |
3000 |
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詢價(jià) |
