HEF4541BT集成電路（IC）的可編程定時器振蕩器規(guī)格書PDF中文資料

1. General description

The HEF4541B is a programmable timer. It consists of a 16-stage binary counter, an integrated

oscillator to be used with external timing components, an automatic power-on reset and output

control logic. The external components RTC and CTC determines the frequency of the oscillator

within the frequency range 1 Hz to 100 kHz. An external clock signal at input RS can replace the

oscillator. The timer advances on the positive-going transition of RS. A LOW on the auto reset input

(AR) and a LOW on the master reset input (MR) enables the internal power-on reset. A HIGH level

at input MR resets the counter independent on all other inputs. Resetting, disables the oscillator to

provide no active power dissipation.

A HIGH at input AR turns off the power-on reset to provide a low quiescent power dissipation of the

timer. The 16-stage counter divides the oscillator frequency by 28, 210, 213 or 216 depending on the

state of the address inputs (A0, A1). The divided oscillator frequency is available at output O. The

phase input (PH) features a complementary output signal. When the mode select input (MODE) is

LOW the timer is a single transition timer and when HIGH the timer is a 2n frequency divider.

It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually

ground). Unused inputs must be connected to VDD, VSS, or another input.

2. Features and benefits

? Wide supply voltage range from 3.0 V to 15.0 V

? CMOS low power dissipation

? High noise immunity

? Fully static operation

? 5 V, 10 V, and 15 V parametric ratings

? Standardized symmetrical output characteristics

? Complies with JEDEC standard JESD 13-B

? ESD protection:

? HBM JESD22-A114F exceeds 2000 V

? MM JESD22-A115-A exceeds 200 V

? Specified from -40 °C to +85 °C and from -40 °C to +125 °C