HEF4557BT集成電路（IC）的移位寄存器規(guī)格書PDF中文資料

1. General description

The HEF4557B is a static clocked serial shift register whose length may be programmed

to be any number of bits between 1 and 64. The number of bits selected is equal to the

sum of the subscripts of the enabled length control inputs (L1, L2, L4, L8, L16, and L32)

plus one. Serial data may be selected from the DA or DB data inputs with the A/B select

input. This feature is useful for recirculation purposes. Information on DA or DB is shifted

into the first register position and all the data in the register is shifted one position to the

right on the LOW to HIGH transition of CP0 while CP1 is LOW or on the HIGH to LOW

transition of CP1 while CP0 is HIGH. A HIGH on master reset (MR) resets the register and

forces Q to LOW and Q to HIGH, independent of the other inputs.

It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS

(usually ground). Unused inputs must be connected to VDD, VSS, or another input.

2. Features and benefits

? Fully static operation

? 5 V, 10 V, and 15 V parametric ratings

? Standardized symmetrical output characteristics

? Specified from ?40 ?C to +85 ?C

? Complies with JEDEC standard JESD 13-B