HYB314100BJL-50中文資料西門子數(shù)據(jù)手冊PDF規(guī)格書

4M x 1-Bit Dynamic RAM Low Power 4M x 1-Bit Dynamic RAM

The HYB 314100BJ/BJL is the new generation dynamic RAM organized as 4 194 304 words by 1-bit. The HYB 314100BJ/BJL utilizes CMOS silicon gate process as well as advances circuit techniques to provide wide operation margins, both internally and for the system user. Multiplexed address inputs permit the HYB 514100BJ/BJL to be packed in a standard plastic P-SOJ-26/20 package. This package size provides high system bit densities and is compatible with commonly used automatic testing and insertion equipment. System oriented features include single + 3.3 V (± 0.3 V) power supply, direct interfacing with high performance logic device families.

Advanced Information

? 4 194 304 words by 1-bit organization

? 0 to 70 ?C operating temperature

? Fast Page Mode Operation

? Performance:

? Single + 3.3 V (± 0.3 V ) supply with a built-in Vbb generator

? Low power dissipation

max. 252 mW active (-50 version)

max. 216 mW active (-60 version)

max. 198 mW active (-70 version)

? Standby power dissipation:

7.2 mW max. standby (TTL)

3.6 mW max. standby (CMOS)

720 μW max. standby (CMOS) for Low Power Version

? Output unlatched at cycle end allows two-dimensional chip selection

? Read, write, read-modify write, CAS-before-RAS refresh, RAS-only refresh, hidden refresh and test mode capability

? All inputs and outputs TTL-compatible

? 1024 refresh cycles / 16 ms

? 1024 refresh cycles / 128 ms Low Power Version

? Plastic Packages: P-SOJ-26/20-5 with 300 mil width