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ICL7101CDL中文資料Intersil數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

ICL7101CDL
廠商型號(hào)

ICL7101CDL

功能描述

Guaranteed zero reading for 0 volts input

文件大小

596.79 Kbytes

頁(yè)面數(shù)量

8 頁(yè)

生產(chǎn)廠商 Intersil Corporation
企業(yè)簡(jiǎn)稱

Intersil

中文名稱

Intersil Corporation官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-2-19 20:46:00

ICL7101CDL規(guī)格書(shū)詳情

FEATURES

Guaranteed zero reading for 0 volts input

Auto-zero; auto polarity

5pA input current typical

Single reference voltage

Latched paratlel (full-time) BCD output for LCDs or

data busing

True polarity at zero count for precise null detection

On-board clock and reference

GENERAL DESCRIPTION

The 8052/7101 A/D Pair, with its parallel BCD outputs, isideally suited for data processing applications or interfacingwith 3?-digit Liquid Crystal Displays. No external circuitryis required to demultiplex the information. In addition, ihas a start/reset input and busy output that allows easysynchronization to system requirements. The 8052/7101provides 4?-digit accuracy in a 3?-digit format with typicasystem performance like 5pA input leakage, auto-zero to

10μVwith less than 1μV/C drift and Linearity to 0.002%The 8052/7101 A/D pair also features conversion rate

from 10 seconds to 30 per second, making them ideall

suited for a wide variety of applications.

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