首頁(yè)>ICS8530DYI-01T>規(guī)格書(shū)詳情
ICS8530DYI-01T中文資料ICST數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
| 廠商型號(hào) |
ICS8530DYI-01T |
| 功能描述 | LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER |
| 文件大小 |
267.96 Kbytes |
| 頁(yè)面數(shù)量 |
17 頁(yè) |
| 生產(chǎn)廠商 | Integrated Circuit Systems |
| 企業(yè)簡(jiǎn)稱 |
ICST |
| 中文名稱 | Integrated Circuit Systems官網(wǎng) |
| 原廠標(biāo)識(shí) |  |
| 數(shù)據(jù)手冊(cè) | |
| 更新時(shí)間 | 2025-2-15 18:23:00 |
ICS8530DYI-01T規(guī)格書(shū)詳情
GENERAL DESCRIPTION
The ICS8530I-01 is a low skew, 1-to-16 Differential-to-3.3V LVPECL Fanout Buffer and a member of the HiPerClockS?family of High Performance Clock Solutions from ICS. The CLK, nCLK pair can accept most standard differential input levels. The high gain differential amplifier accepts peak-topeak input voltages as small as 150mV as long as the common mode voltage is within the specified minimum and maximum range.
FEATURES
? (16) differential 3.3V LVPECL outputs
? CLK, nCLK input pair
? CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
? Maximum output frequency: 500MHz
? Translates any single-ended input signal to 3.3V LVPECL levels with a resistor bias on nCLK input
? Output skew: 50ps (typical)
? Part-to-part skew: 100ps (typical)
? Additive phase jitter, RMS @ 106.25MHz: 0.022ps (typical) @ 25°C
? 3.3V output operating supply
? -40°C to 85°C ambient operating temperature
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|---|---|---|---|---|---|---|---|
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24+ |
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56000 |
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詢價(jià) | ||
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60 |
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23+ |
ICS |
60 |
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IDT |
21+ |
QFP32 |
10000 |
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詢價(jià) | ||
IDT |
24+ |
QFP48 |
880000 |
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詢價(jià) | ||
ICS |
23+ |
BGAQFP |
8659 |
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QFP |
589220 |
16余年資質(zhì) 絕對(duì)原盒原盤(pán) 更多數(shù)量 |
詢價(jià) | ||||
IDT |
23+ |
QFP |
4500 |
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詢價(jià) | ||
ICS |
45 |
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詢價(jià) |
