IDT77V500S25BC中文資料瑞薩數(shù)據(jù)手冊(cè)PDF規(guī)格書

Single chip controller for IDT77V400 Switching Memory

One IDT77V500 and one IDT77V400 form the core required

for a 1.2Gbps 8 x 8 port non-blocking switch

Supports up to 8192 Virtual Connections (VCs)

Per VC queuing for fairness, with four priorities per VC

available for each output port of the switch

Capable of supporting CBR, VBR, UBR, and ABR (EFCI)

service classes

Low power dissipation

? 430mW (typ.)

Optional header modification operation

Multicasting and Broadcasting capability

Provides congestion management support through EFCI,

CLP, and EPD functionality

System clock cycle times as fast as 25ns (40MHz)

Option available for resolving contention issues between

multiple IDT77V500 configurations