ISP1161中文資料飛利浦?jǐn)?shù)據(jù)手冊PDF規(guī)格書

General description

The ISP1161 is a single-chip Universal Serial Bus (USB) Host Controller (HC) and Device Controller (DC) which complies with Universal Serial Bus Specification Rev 1.1. These two USB controllers, the HC and the DC, share the same microprocessor bus interface. They have the same data bus, but different I/O locations. They also have separate interrupt request output pins, separate DMA channels that include separate DMA request output pins and DMA acknowledge input pins. This makes it possible for a microprocessor to control both the USB HC and the USB DC at the same time.

Features

■ Complies with Universal Serial Bus Specification Rev 1.1

■ Combines HC and DC in a single chip

■ On-chip DC complies with most Device Class specifications

■ Both HC and DC can be accessed by an external microprocessor via separate I/O port addresses

■ Selectable one or two downstream ports for HC and one upstream port for DC

■ High speed parallel interface to most of the generic microprocessors and Reduced Instruction Set Computer (RISC) processors (Hitachi SH-3 and SH-4, MIPS-based RISC, ARM7/9, StrongARM, etc.). Maximum 15 Mbyte/s data transfer rate between microprocessor and the HC, 11.1 Mbyte/s data transfer rate

between microprocessor and the DC

■ Supports single-cycle burst mode and multiple-cycle burst mode DMA operations

■ Up to 14 programmable USB endpoints with 2 fixed control IN/OUT endpoints for the DC

■ Built in separate FIFO buffer RAM for HC (4 kbytes) and DC (2462 bytes)

■ Endpoints with double buffering to increase throughput and ease real-time data transfer for both DC transfers and HC isochronous (ISO) transactions

■ 6 MHz crystal oscillator with integrated PLL for low EMI

■ Controllable LazyClock (24 kHz) output during ‘suspend’

■ Clock output with programmable frequency (3 to 48 MHz)

■ Software controlled connection to the USB bus (SoftConnect) on upstream port for the DC

■ Good USB connection indicator that blinks with traffic (GoodLink) for the DC

■ Built-in software selectable internal 15 k? pull-down resistors for HC downstream ports

■ Dedicated pins for suspend sensing output and wakeup control input for flexible applications

■ Global hardware reset input pin and separate internal software reset circuits for HC and DC

■ Operation at either +5 V or +3.3 V power supply input

■ 8 kV in-circuit ESD protection

■ Operating temperature range ?40 to +85 °C

■ Available in two LQFP64 packages (SOT314-2 and SOT414-1).

Applications

■ Personal Digital Assistant (PDA)

■ Digital camera

■ Third-generation (3-G) phone

■ Set-top box (STB)

■ Information Appliance (IA)

■ Photo printer

■ MP3 jukebox

■ Game console.