IW4027BD中文資料INTEGRAL數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
IW4027BD規(guī)格書(shū)詳情
Dual JK Flip-Flop
The IW4027B is a Dual JK Flip-Flop which is edge-triggered and features independent Set, Reset, and Clock inputs. Data is accepted when the Clock is LOW and transferred to the output on the positivegoing edge of the Clock. The active HIGH asynchronous Reset and Set are independent and override the J, K, or Clock inputs. The outputs are buffered for best system performance.
? Operating Voltage Range: 3.0 to 18 V
? Maximum input current of 1 mA at 18 V over full package temperature range; 100 nA at 18 V and 25°C
? Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
產(chǎn)品屬性
- 型號(hào)：
IW4027BD
- 制造商：
INTEGRAL
- 制造商全稱：
INTEGRAL
- 功能描述：
Dual JK Flip-Flop
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
HYNIX/海力士 |
24+ |
SOP16 |
990000 |
明嘉萊只做原裝正品現(xiàn)貨 |
詢價(jià) | ||
IKSEMI |
24+ |
DIP16SOP16 |
50000 |
絕對(duì)原廠原裝,長(zhǎng)期優(yōu)勢(shì)可定貨 |
詢價(jià) | ||
HYNIX/海力士 |
23+ |
SOP16 |
6850 |
只做原廠原裝正品現(xiàn)貨!假一賠十! |
詢價(jià) | ||
HYNIX/海力士 |
22+ |
SOP16 |
12000 |
只做原裝、原廠優(yōu)勢(shì)渠道、假一賠十 |
詢價(jià) | ||
INT |
24+ |
NA |
9000 |
只做原裝正品 有掛有貨 假一賠十 |
詢價(jià) | ||
JAT |
23+ |
SOD-423 |
54493 |
##公司主營(yíng)品牌長(zhǎng)期供應(yīng)100%原裝現(xiàn)貨可含稅提供技術(shù) |
詢價(jià) | ||
HYNIX |
24+ |
SOP-16P |
60 |
詢價(jià) | |||
INTEGRAL |
SOIC-16 |
8560 |
一級(jí)代理 原裝正品假一罰十價(jià)格優(yōu)勢(shì)長(zhǎng)期供貨 |
詢價(jià) | |||
HYNIX |
24+ |
SOP-3.9-16P |
2560 |
絕對(duì)原裝!現(xiàn)貨熱賣! |
詢價(jià) | ||
INTEGRAL |
1650+ |
DIP |
7500 |
只做原裝進(jìn)口,假一罰十 |
詢價(jià) |
