M48Z35-70MH1TR中文資料意法半導(dǎo)體數(shù)據(jù)手冊PDF規(guī)格書

Description

The M48Z35/Y ZEROPOWER? RAM is a 32K x 8, non-volatile static RAM that integrates power-fail deselect circuitry and battery control logic on a single die. The monolithic chip is available in two special packages to provide a highly integrated battery backed-up memory solution.

Features

■ Integrated, ultra low power SRAM, power-fail

control circuit, and battery

■ READ cycle time equals WRITE cycle time

■ Automatic power-fail chip deselect and WRITE

protection

■ WRITE protect voltages:

(VPFD = Power-fail Deselect Voltage)

– M48Z35: VCC = 4.75 to 5.5V

4.5V ≤ VPFD ≤ 4.75V

– M48Z35Y: 4.5 to 5.5V

4.2v ≤ Vpfd ≤ 4.5v

■ Self-contained battery in the CAPHAT? DIP

package

■ Packaging includes a 28-lead SOIC and

SNAPHAT? top (to be ordered separately)

■ Pin and function compatible with JEDEC

standard 32K x 8 SRAMs

■ SOIC package provides direct connection for a

SNAPHAT top which contains the battery

■ RoHS compliant

– Lead-free second level interconnect