M5M5Y5636TG-20中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION

The M5M5Y5636TG is a family of 18M bit synchronous SRAMs organized as 524288-words by 36-bit. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Mitsubishis SRAMs are fabricated with high performance, low power CMOS technology, providing greater reliability. M5M5Y5636TG operates on a single 1.8V power supply and are 1.8V CMOS compatible.

FEATURES

? Fully registered inputs and outputs for pipelined operation

? Fast clock speed: 250, 225, and 200 MHz

? Fast access time: 2.6, 2.8, 3.2 ns

? Single 1.8V +150/-100mV power supply VDD

? Separate VDDQ for 1.8V I/O

? Individual byte write (BWa# - BWd#) controls may be tied LOW

? Single Read/Write control pin (W#)

? Echo Clock outputs track data output drivers

? ZQ mode pin for user-selectable output drive strength

? 2 User programmable chip enable inputs for easy depth expansion

? Linear or Interleaved Burst Modes

? JTAG boundary scan support

APPLICATION

High-end networking products that require high bandwidth, such as switches and routers.