M68AW512集成電路（IC）的存儲(chǔ)器規(guī)格書(shū)PDF中文資料

M68AW512屬于集成電路（IC）的存儲(chǔ)器。由意法半導(dǎo)體集團(tuán)制造生產(chǎn)的M68AW512存儲(chǔ)器存儲(chǔ)器是集成電路上用作數(shù)據(jù)存儲(chǔ)設(shè)備的半導(dǎo)體器件。這些器件分為非易失性或易失性?xún)煞N，格式包括 CBRAM、DRAM、EEPROM、EERAM、EPROM、閃存、FRAM、NVSRAM、PCM (PRAM)、PSRAM、RAM 和 SRAM。這些器件的存儲(chǔ)容量為 64 b 至 6 Tb 不等，接口有 I2C、MMC、并行、eMMC、串行、單線、SPI、UFS、Xccela 總線和 1-線。

SUMMARY DESCRIPTION

The M68AW512D is an 8 Mbit (8,388,608 bit) CMOS SRAM, organized as 524,288 words by 16 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 2.7 to 3.6V supply. This device has a Chip Select pin (E2) for easy memory expansion; when it is active (E2 high) the device has an automatic power-down feature, reducing the power consumption by over 99.

The M68AW512D is available in TFBGA48 (0.75 mm ball pitch) package.

FEATURES SUMMARY

■ SUPPLY VOLTAGE: 2.7 to 3.6V

■ 512K x 16 bits SRAM with OUTPUT ENABLE

■ EQUAL CYCLE and ACCESS TIMES: 55, 70ns

■ LOW STANDBY CURRENT

■ LOW VCC DATA RETENTION: 1.5V

■ TRI-STATE COMMON I/O

■ AUTOMATIC POWER DOWN