MB15F73SP中文資料富士通數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

■ DESCRIPTION

The Fujitsu MB15F73SP is a serial input Phase Locked Loop (PLL) frequency synthesizer with a 2000 MHz prescaler and a 600 MHz prescaler. A 64/65 or a 128/129 for the 2000 MHz prescaler, and a 8/9 or a 16/17 for the 600 MHz prescaler can be selected for the prescaler that enables pulse swallow operation.

MB15F73SP has the same configuration with MB15F03 or MB15F03L. The BiCMOS process is used , as a result a supply current is typically 3.5 mA at 2.7 V. The supply voltage range is from 2.4 V to 3.6 V. A refined charge pump supplies well-balanced output current with 1.5 mA and 6 mA selectable by serial data.

The new package (BCC20) decreases an area of MB15F73SP more than 30 comparing with the former BCC16 (for dual PLL).

MB15F73SP is ideally suited for wireless mobile communications, such as PDC.

■ FEATURES

? High frequency operation : RF synthesizer : 2000 MHz max : IF synthesizer : 600 MHz max

? Low power supply voltage : VCC = 2.4 to 3.6 V

? Ultra Low power supply current : ICC = 3.5 mA typ. (VCC = Vp = 2.7 V, Ta = +25°C, SWIF = SWRF = 0 in IF/RF locking state)

? Direct power saving function: Power supply current in power saving mode Typ. 0.1 μA (VCC = Vp = 2.7 V, Ta = +25°C) Max. 10 μA (VCC = Vp = 2.7 V)

? Software selectable charge pump current: 1.5 mA/6.0 mA typ.

? Dual modulus prescaler: 2000 MHz prescaler (64/65 or128/129 )/600 MHz prescaler (8/9 or 16/17)

? 23 bit shift register

? Serial input binary 14-bit programmable reference divider: R = 3 to 16,383

? Serial input programmable divider consisting of:

- Binary 7-bit swallow counter: 0 to 127

- Binary 11-bit programmable counter: 3 to 2,047

? Built-in high-speed tuning, low-noise phase comparator, current-switching type constant current circuit

? On–chip phase control for phase comparator

? Built-in digital locking detector circuit to detect PLL locking and unlocking

? Operating temperature: Ta = –40 to +85°C

? Sireal data format compatible with MB15F02SL