MX66C1024TI-70中文資料????????????旺宏數(shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION

The MX66C1024 is a high performance, extremely low power CMOS Static Random Access Memory organized as 131,072 words by 8 bits and operates at 5.0V supply voltage.

Advanced CMOS technology and circuit techniques provide both high speed and low power features with a typical CMOS standby current of 0.005uA and maximum access time of 70ns and 100ns Easy memory expansion is provided by an active LOW chip enable (CE1), an active HIGH chip enable (CE2), and active LOW output enable (OE) and three-state output drivers.

The MX66C1024 has an automatic power down feature, reducing the power consumption significantly when chip is deselected.

The MX66C1024 is available in the JEDEC standard 32 pin SOP, STSOP and TSOP.

FEATURES

? Vcc operation voltage : 5V

? Low power consumption :

45mA (Max.) write current

2mA (Max.) read current

0.6uA (Typ.) CMOS standby current

? High speed access time :

-70 70ns (Max.)

-10 100ns (Max.)

? Input levels are CMOS-compatible

? Automatic power down when chip is deselected

? Three state outputs

? Fully static operation

? Data retention supply voltage as low as 1.2V

? Easy expansion with CE2, CE1, and OE options