N74F377AN中文資料飛利浦?jǐn)?shù)據(jù)手冊(cè)PDF規(guī)格書
N74F377AN規(guī)格書詳情
DESCRIPTION
The 74F377A has 8 edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered clock (CP) input loads all flip-flops simultaneously when the Enable (E) input is Low.
The register is fully edge triggered. The state of each D input, one set-up time before the Low-to-High clock transition, is transferred to the corresponding flip-flop’s Q output.
The E input must be stable one setup time prior to the Low-to-High clock transition for predictable operation.
FEATURES
? High impedance inputs for reduced loading (20μA in Low and High states)
? Ideal for addressable register applications
? Enable for address and data synchronization applications
? Eight edge–triggered D–type flip–flops
? Buffered common clock
? See ’F273A for Master Reset version
? See ’F373 for transparent latch version
? See ’F374 for 3–State version
產(chǎn)品屬性
- 型號(hào)：
N74F377AN
- 制造商：
NXP Semiconductors
- 功能描述：
Flip Flop, Octal, D Type, 20 Pin, Plastic, DIP
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
PHI |
97+ |
SOP20 |
1000 |
一級(jí)代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
詢價(jià) | ||
PHILIPS/飛利浦 |
23+ |
NA/ |
4480 |
原裝現(xiàn)貨,當(dāng)天可交貨,原型號(hào)開票 |
詢價(jià) | ||
PHIL |
23+ |
NA |
6500 |
全新原裝假一賠十 |
詢價(jià) | ||
PIL |
2020+ |
DIP2-0 |
80000 |
只做自己庫存,全新原裝進(jìn)口正品假一賠百,可開13%增 |
詢價(jià) | ||
PHIL |
1997 |
9000 |
原裝正品現(xiàn)貨庫存價(jià)優(yōu) |
詢價(jià) | |||
N74F378N |
5 |
5 |
詢價(jià) | ||||
PHI |
22+23+ |
DIP-20 |
37901 |
絕對(duì)原裝正品全新進(jìn)口深圳現(xiàn)貨 |
詢價(jià) | ||
PHI |
589220 |
16余年資質(zhì) 絕對(duì)原盒原盤 更多數(shù)量 |
詢價(jià) | ||||
PHI |
9514 |
DIP-20 |
468 |
原裝現(xiàn)貨海量庫存歡迎咨詢 |
詢價(jià) | ||
PHILIPS |
6000 |
面議 |
19 |
DIP/SMD |
詢價(jià) |
