P4C188中文資料ETC數(shù)據(jù)手冊PDF規(guī)格書

[Performance-Semiconductor]

DESCRIPTION

The P4C188 and P4C188L are 65,536-bit ultra high speed static RAMs organized as 16K x 4. The CMOS memories require no clocks or refreshing and have equal access and cycle times. Inputs and outputs are fully TTL-compatible. The RAMs operate from a single 5V±10 tolerance power supply. With battery backup, data integrity is maintained for supply voltages down to 2.0V. Current drain is typically 10 μA from a 2.0V supply.

FEATURES

■ Full CMOS, 6T Cell

■ High Speed (Equal Access and Cycle Times)

– 10/12/15/20/25 ns (Commercial)

– 12/15/20/25/35 (Industrial)

– 15/20/25/35/45 ns (Military)

■ Low Power (Commercial/Military)

– 715 mW Active – 12/15

– 550/660 mW Active – 20/25/35/45

– 193/220 mW Standby (TTL Input)

– 83/110 mW Standby (CMOS Input) P4C188

– 15 mW Standby (CMOS Input)

(P4C188L Military)

■ Single 5V±10 Power Supply

■ Data Retention with 2.0V Supply

(P4C188L Military)

■ Three-State Outputs

■ TTL/CMOS Compatible Outputs

■ Fully TTL Compatible Inputs

■ Standard Pinout (JEDEC Approved)

– 22-Pin 300 mil DIP

– 24-Pin 300 mil SOJ

– 22-Pin 290 x 490 mil LCC