首頁(yè)>PCD5002U/10>規(guī)格書(shū)詳情
PCD5002U/10中文資料飛利浦?jǐn)?shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

廠商型號(hào) |
PCD5002U/10 |
功能描述 | Advanced POCSAG and APOC-1 Paging Decoder |
文件大小 |
203.79 Kbytes |
頁(yè)面數(shù)量 |
48 頁(yè) |
生產(chǎn)廠商 | NXP Semiconductors |
企業(yè)簡(jiǎn)稱 |
Philips【飛利浦】 |
中文名稱 | 荷蘭皇家飛利浦官網(wǎng) |
原廠標(biāo)識(shí) | ![]() |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2025-5-25 23:01:00 |
人工找貨 | PCD5002U/10價(jià)格和庫(kù)存,歡迎聯(lián)系客服免費(fèi)人工找貨 |
PCD5002U/10規(guī)格書(shū)詳情
GENERAL DESCRIPTION
The PCD5002 is a very low power pager decoder and controller, capable of handling both standard POCSAG and the advanced APOC-1 code. Continuous data decoding upon reception of a dedicated sync word is available for news pager applications.
Data rates supported are 512, 1200 and 2400 bits/s using a single 76.8 kHz crystal. On-chip EEPROM is programmable using a minimum supply voltage of 2.0 V, allowing ‘over-the-air’ programming. I2C-bus compatible.
FEATURES
? Wide operating supply voltage range: 1.5 to 6.0 V
? EEPROM programming requires only 2.0 V supply
? Low operating current: 50 μA typ. (ON), 25 μA typ. (OFF)
? Temperature range ?25 to +70 °C
? “CCIR radio paging Code No. 1” (POCSAG) compatible
? Supports Advanced Pager Operator’s Code Phase 1 (APOC-1) for extended battery economy
? 512, 1200 and 2400 bits/s data rates using 76.8 kHz crystal
? Built-in data filter (16-times oversampling) and bit clock recovery
? Advanced ACCESS? synchronization algorithm
? 2-bit random and (optional) 4-bit burst error correction
? Up to 6 user addresses (RICs), each with 4 functions/alert cadences
? Up to 6 user address frames, independently programmable
? Standard POCSAG sync word, plus up to 4 user programmable sync words
? Continuous data decoding upon reception of user programmable sync word (optional)
? Received data inversion (optional)
? Call alert via beeper, vibrator or LED
? 2-level acoustic alert using single external transistor
? Alert control: automatic (POCSAG type), via cadence register or alert input pin
? Separate power control of receiver and RF oscillator for battery economy
? Synthesizer set-up and control interface (3-line serial)
? On-chip EEPROM for storage of user addresses (RICs), pager configuration and synthesizer data
? On-chip SRAM buffer for message data
? Slave I2C-bus interface to microcontroller for transfer of message data, status/control and EEPROM programming (data transfer at up to 100 kbits/s)
? Wake-up interrupt for microcontroller, programmable polarity
? Direct and I2C-bus control of operating status (ON/OFF)
? Battery-low indication (external detector)
? Out-of-range condition indication
? Real time clock reference output
? On-chip voltage doubler
? Interfaces directly to UAA2080 and UAA2082 paging receivers.
APPLICATIONS
? Advanced display pagers (POCSAG and APOC-1)
? Basic alert-only pagers
? Information services
? Personal organizers
? Telepoint
? Telemetry/data transmission.
產(chǎn)品屬性
- 型號(hào):
PCD5002U/10
- 制造商:
PHILIPS
- 制造商全稱:
NXP Semiconductors
- 功能描述:
Advanced POCSAG and APOC-1 Paging Decoder
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
PHILIPS/飛利浦 |
24+ |
NA/ |
1850 |
優(yōu)勢(shì)代理渠道,原裝正品,可全系列訂貨開(kāi)增值稅票 |
詢價(jià) | ||
PHILIPS |
24+ |
QFP |
80000 |
只做自己庫(kù)存,全新原裝進(jìn)口正品假一賠百,可開(kāi)13%增 |
詢價(jià) | ||
PHILIPS/飛利浦 |
25+ |
QFP-32 |
65428 |
百分百原裝現(xiàn)貨 實(shí)單必成 |
詢價(jià) | ||
PHI |
25+23+ |
QFP-32 |
9701 |
絕對(duì)原裝正品全新進(jìn)口深圳現(xiàn)貨 |
詢價(jià) | ||
PHILIPS/飛利浦 |
00+ |
QFP32 |
880000 |
明嘉萊只做原裝正品現(xiàn)貨 |
詢價(jià) | ||
PHI |
24+ |
QFP |
18000 |
詢價(jià) | |||
PHILIPS/飛利浦 |
24+ |
QFP-32 |
9600 |
原裝現(xiàn)貨,優(yōu)勢(shì)供應(yīng),支持實(shí)單! |
詢價(jià) | ||
PHILIPS/飛利浦 |
2447 |
QFP |
100500 |
一級(jí)代理專營(yíng)品牌!原裝正品,優(yōu)勢(shì)現(xiàn)貨,長(zhǎng)期排單到貨 |
詢價(jià) | ||
PHI |
2000 |
QFP |
6000 |
一級(jí)代理,專注軍工、汽車(chē)、醫(yī)療、工業(yè)、新能源、電力 |
詢價(jià) | ||
PHI |
99+ |
QFP-32 |
46 |
原裝現(xiàn)貨海量庫(kù)存歡迎咨詢 |
詢價(jià) |