PI6C2302中文資料百利通數(shù)據(jù)手冊(cè)PDF規(guī)格書
PI6C2302規(guī)格書詳情
Product Description
The PI6C2302 features a low-skew, low-jitter, phase-locked loop (PLL) clock driver. By connecting the feedback CLK_OUT output to the feedback FB_IN input, the propagation delay from the CLK_IN input to any clock output will be nearly zero. The PI6C2302 provides 2X CLK_IN on CLK_OUT output.
Product Features
? 2X CLK_IN on CLK_OUT
? High-Performance Phase-Locked-Loop Clock Distribution
for Networking, ATM, 100/134 MHz Registered DIMM
Synchronous DRAM modules for server/workstation/
PC applications
? Zero Input-to-Output delay
? Low jitter: Cycle-to-Cycle jitter –100ps max.
? On-chip series damping resistor at clock output drivers
for low noise and EMI reduction
? Operates at 3.3V VCC
? Wide range of Clock Frequencies
? Package:
Plastic 8-pin SOIC Package (W)
產(chǎn)品屬性
- 型號(hào)：
PI6C2302
- 制造商：
PERICOM
- 制造商全稱：
Pericom Semiconductor Corporation
- 功能描述：
Phase-Locked Loop Clock Driver
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
PI |
2023+ |
SOP16 |
3875 |
全新原廠原裝產(chǎn)品、公司現(xiàn)貨銷售 |
詢價(jià) | ||
Pericom |
2339+ |
SOP-8 |
5989 |
公司原廠原裝現(xiàn)貨假一罰十!特價(jià)出售!強(qiáng)勢(shì)庫存! |
詢價(jià) | ||
PERICOM |
22+ |
SOP8 |
9800 |
只做原裝正品假一賠十!正規(guī)渠道訂貨! |
詢價(jià) | ||
PERICOM |
24+ |
SOP8 |
58000 |
全新原廠原裝正品現(xiàn)貨,可提供技術(shù)支持、樣品免費(fèi)! |
詢價(jià) | ||
PERICOM |
2023+ |
SOP |
8635 |
一級(jí)代理優(yōu)勢(shì)現(xiàn)貨,全新正品直營店 |
詢價(jià) | ||
PERICOM |
22+23+ |
SOP |
32538 |
絕對(duì)原裝正品全新進(jìn)口深圳現(xiàn)貨 |
詢價(jià) | ||
PERICOM |
589220 |
16余年資質(zhì) 絕對(duì)原盒原盤 更多數(shù)量 |
詢價(jià) | ||||
PERICOM |
SOP |
8399 |
集團(tuán)化配單-有更多數(shù)量-免費(fèi)送樣-原包裝正品現(xiàn)貨-正規(guī) |
詢價(jià) | |||
PERICOM |
SOP |
68500 |
一級(jí)代理 原裝正品假一罰十價(jià)格優(yōu)勢(shì)長期供貨 |
詢價(jià) | |||
24+ |
3000 |
公司存貨 |
詢價(jià) |
