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PLL102-05SCL-R中文資料PLL數(shù)據(jù)手冊PDF規(guī)格書
PLL102-05SCL-R規(guī)格書詳情
DESCRIPTION
The PLL102-05 is a high performance, low skew, low jitter zero delay buffer designed to distribute high speed clocks and is available in 8-pin SOIC package. It has four outputs that are synchronized with the input. The synchronization is established via CLKOUT feed back to the input of the PLL. Since the skew between the input and output is less than ±350 ps, the device acts as a zero delay buffer.
FEATURES
? Frequency range 25 ~ 60MHz.
? Internal phase locked loop will allow spread spectrum modulation on reference clock to pass to the outputs (up to 100kHz SST modulation).
? Zero input - output delay.
? Less than 700 ps device - device skew.
? Less than 250 ps skew between outputs.
? Less than 150 ps cycle - cycle jitter.
? Output Enable function tri-state outputs.
? 3.3V operation.
? Available in 8-Pin 150mil SOIC.
產(chǎn)品屬性
- 型號：
PLL102-05SCL-R
- 制造商：
PLL
- 制造商全稱：
PLL
- 功能描述：
Low Skew Output Buffer
| 供應商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
|---|---|---|---|---|---|---|---|
Phaselink |
23+ |
SOIC8 |
2864 |
原廠原裝正品 |
詢價 | ||
只做原裝 |
24+ |
SOP-8 |
36520 |
一級代理/放心采購 |
詢價 | ||
PHASELINK |
23+ |
SOIC8 |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價 | ||
A/N |
1715+ |
SOP |
251156 |
只做原裝正品現(xiàn)貨假一賠十! |
詢價 | ||
PHASELINK |
22+23+ |
SSOP |
36452 |
絕對原裝正品全新進口深圳現(xiàn)貨 |
詢價 | ||
Phaseli |
23+ |
SOIC8 |
8560 |
受權(quán)代理!全新原裝現(xiàn)貨特價熱賣! |
詢價 | ||
Phaselink |
23+ |
SOIC8 |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價 | ||
PLL |
23+ |
SSOP |
360000 |
原廠授權(quán)一級代理,專業(yè)海外優(yōu)勢訂貨,價格優(yōu)勢、品種 |
詢價 | ||
PHASELL |
2020+ |
SOP-8 |
80000 |
只做自己庫存,全新原裝進口正品假一賠百,可開13%增 |
詢價 | ||
PHASELINK |
22+ |
SOIC8 |
5000 |
全新原裝現(xiàn)貨!自家?guī)齑? |
詢價 |
