PM5352中文資料PMC數(shù)據(jù)手冊(cè)PDF規(guī)格書
| 廠商型號(hào) |
PM5352 |
| 功能描述 | 155 Mbit/s ATM and Packet-Over-SONET/SDH Physical Layer Device |
| 文件大小 |
57.29 Kbytes |
| 頁面數(shù)量 |
2 頁 |
| 生產(chǎn)廠商 | PMC-Sierra, Inc |
| 企業(yè)簡(jiǎn)稱 |
PMC |
| 中文名稱 | PMC-Sierra, Inc官網(wǎng) |
| 原廠標(biāo)識(shí) |  |
| 數(shù)據(jù)手冊(cè) | |
| 更新時(shí)間 | 2025-5-18 22:30:00 |
| 人工找貨 | PM5352價(jià)格和庫存，歡迎聯(lián)系客服免費(fèi)人工找貨 |
PM5352規(guī)格書詳情
DATASHEET OVERVIEW
The PM5352 S/UNI-STAR is functionally equivalent to a single channel PM5351 S/UNI-TETRA (TETRA channel #4). The devices are software compatible and pin compatible. This datasheet provides a complete pinout description for the S/UNI-STAR, as well as any differences between these devices (including boundary scan register, test mode 0 register). For a complete functional and register description, please refer to the PMC-971240.
FEATURES
General
? Single chip ATM User-Network Interface operating at 155.52 Mbit/s.
? Implements the ATM Forum User Network Interface Specification and the ATM physical layer for Broadband ISDN according to CCITT Recommendation I.432.
? Implements the Point-to-Point Protocol (PPP) over SONET/SDH specification according to RFC 1619/1662 of the PPP Working Group of the Internet Engineering Task Force (IETF).
? Processes duplex 155.52 Mbit/s STS-3c (STM-1) data streams with on-chip clock and data recovery and clock synthesis.
? Exceeds Bellcore GR-253-CORE jitter tolerance and intrinsic jitter criteria.
? Exceeds Bellcore GR-253-CORE jitter transfer and phase variation criteria.
? Provides control circuitry required to exceed Bellcore GR-253-CORE WAN clocking requirements related to wander transfer, holdover and long term stability when using an external VCXO.
? Compatible with ATM Forum’s Utopia Level 2 Specification with MultiPHY addressing and parity support.
? Implements the POS-PHY 16-bit System Interface for Packet over SONET/SDH (POS) applications. This system interface is similar to Utopia Level 2, but adapted to packet transfer. Both byte-level and packet-level transfer modes are supported.
? Provides a standard 5 signal IEEE 1149.1 JTAG test port for boundary scan board test purposes.
? Provides a generic 8-bit microprocessor bus interface for configuration, control, and status monitoring.
? Low power 3.3V CMOS with PECL and TTL compatible inputs and CMOS/TTL outputs, with 5V tolerance inputs (system side interface is 3.3V only).
? Industrial temperature range (-40°C to +85°C).
? 304 pin Super BGA package.
APPLICATIONS
? DSLAM uplinks
? Access Concentrators
? WAN and edge ATM switches.
? LAN switches and hubs.
? Layer 3 switches.
? Multiservice switches (FR, ATM, IP, etc..).
產(chǎn)品屬性
- 型號(hào)：
PM5352
- 制造商：
PMC
- 制造商全稱：
PMC
- 功能描述：
SATURN USER NETWORK INTERFACE 155(STAR)
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
PMC |
24+ |
BGA |
80000 |
只做自己庫存,全新原裝進(jìn)口正品假一賠百,可開13%增 |
詢價(jià) | ||
MICROCHIP/PMC |
24+ |
304BGA |
4568 |
全新原廠原裝，進(jìn)口正品現(xiàn)貨，正規(guī)渠道可含稅?。?/div> |
詢價(jià) | ||
PMC |
23+ |
BGA |
140 |
原裝正品現(xiàn)貨 |
詢價(jià) | ||
PMC |
22+ |
BGA |
3000 |
原裝正品,支持實(shí)單 |
詢價(jià) | ||
PMC |
23+ |
BGA |
4500 |
全新原裝、誠信經(jīng)營(yíng)、公司現(xiàn)貨銷售! |
詢價(jià) | ||
PM5352-BI |
1 |
1 |
詢價(jià) | ||||
PMC |
22+ |
BGA |
2000 |
原裝正品現(xiàn)貨 |
詢價(jià) | ||
PMC |
17+ |
BGA |
6200 |
100%原裝正品現(xiàn)貨 |
詢價(jià) | ||
24+ |
3000 |
公司存貨 |
詢價(jià) | ||||
PMC |
23+ |
NA |
1306 |
原裝正品代理渠道價(jià)格優(yōu)勢(shì) |
詢價(jià) |
