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PN5190B1EV/C121E中文資料恩智浦?jǐn)?shù)據(jù)手冊(cè)PDF規(guī)格書

PN5190B1EV/C121E
廠商型號(hào)

PN5190B1EV/C121E

功能描述

NFC frontend

文件大小

2.42683 Mbytes

頁(yè)面數(shù)量

309 頁(yè)

生產(chǎn)廠商 NXP Semiconductors
企業(yè)簡(jiǎn)稱

nxp恩智浦

中文名稱

恩智浦半導(dǎo)體公司官網(wǎng)

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更新時(shí)間

2025-5-7 11:51:00

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PN5190B1EV/C121E規(guī)格書詳情

General description

This document describes the functionality and electrical specification of the high-power

NFC-IC PN5190B1, silicon version B1, using firmware or V2.0 or higher.

Additional documents supporting a design-in of the PN5190B1 are available from NXP,

this additional design-in information is not part of this document.

The PN5190B1 supports highly innovative and unique features which do not require any

host controller interaction. These features include dynamic power control (DPC), adaptive

waveform control (AWC), and fully automatic EMD error handling.

The independence of real-time host controller interactions makes this product a good fit

for systems which operate a pre-emptive multitasking OS like Linux or Android.

In this document, the term ?MIFARE card“ refers to a contactless card using an IC out

of the MIFARE Classic, MIFARE Plus, MIFARE Ultralight or MIFARE DESFire product

family.

Features and benefits

2.1 RF functionality

? As a highly integrated high performance full NFC Forum-compliant frontend IC for

contactless communication at 13.56 MHz, this NFC frontend IC utilizes an outstanding

modulation and demodulation concept completely integrated for relevant 13.56 MHz

based contactless communication methods and protocols.

PN5190B1 supports communication with all products of the MIFARE product-based

card family including MIFARE Ultralight, MIFARE Classic 1K/4K, MIFARE DESFire

EV1/EV2 and MIFARE Plus cards CRYPTO implemented in hardware for R/W of all

NXP MIFARE product-based cards (includes intellectual-property licensing rights for

NXP ISO/IEC 14443-A, Innovatron ISO/IEC 14443-B, and NXP MIFARE products).

The PN5190B1 frontend IC supports the following RF operating modes:

2.1.1 ISO/IEC14443-A

? Reader/writer mode supporting ISO/IEC 14443-A R/W up to 848 kBit/s

2.1.2 ISO/IEC14443-B

? Reader/writer mode supporting ISO/IEC 14443-B up to 848 kBit/s

2.1.3 FeliCa

? Reader/writer mode supporting FeliCa 212 kBit/s and 424 kBit/s (without crypto)

2.1.4 Tag type reading

? Supports reading of all NFC tag types (type 1, type 2, type 3, type 4A and type 4B, type

5)

2.1.5 MIFARE card reading

? Reader/writer communication mode for the MIFARE card family including MIFARE

Classic

2.1.6 ISO/IEC 15693

? Reader/writer mode supporting ISO/IEC 15693 (ICODE)

? Proprietary data rates based on ISO/IEC15693 with 106 kbit and 212 kbit/s (for NXP

NTAG 5 communication)

2.1.7 ISO/IEC 18000-3 Mode 3

? Reader/writer mode supporting ISO/IEC 18000-3 Mode 3

2.1.8 ISO/IEC 18092

? ISO/IEC 18092 (NFC-IP1)

2.1.9 ISO/IEC 21481

? ISO/IEC 21481 (NFC-IP-2)

2.1.10 Peer to peer

? P2P Passive 106 kbit/s TO 424 kbit/s, Initiator and Target

? P2P Active 106 kbit/s TO 424 kbit/s, Initiator and Target

? Proprietary passive communication for type A up to 848 kbit/s

? Functionality according to ISO/IEC 21481 (NFC-IP-2)

2.1.11 Card emulation

? ISO/IEC4443-A card mode from 106 Kbit/s up to 848 Kbit/s (PICC) with active load

modulation for increased communication range.

2.2 Host interface

? One host interface based on SPI is implemented:

– SPI interface with data rates up to 15 Mbit/s with MOSI, MISO, NSS and SCK signals

– Interrupt request line to inform host controller on events

– Independent TX and RX buffer for RF data with size of 1024 bytes each

2.3 Integrated DC-DC

? The PN5190B1 implements an integrated DC-DC which can be used to supply the

transmitter. Since the supply voltage of the transmitter LDO can be up to 6.0 Volts, this

simplifies the design of the power supply.

A single supply concept for the RF system, e.g. with single 3.3 V supply, is possible

and allows making use of the maximum RF output power by providing a maximum

transmitter supply voltage.

The integrated DC-DC is used by the dynamic power control (DPC) to reduce the

maximum power dissipation of the chip.

The usage of the DC-DC is optional.

For applications making use of the low-power card detection, the DC-DC is available.

For applications using the ultra low-power card detection (ULPCD), the DC-DC cannot

be used.

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